Leaked Intel Alder Lake slides indicate support for PCIe 5.0 and DDR5

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At this point it would be smart waiting for ddr5 platform from both intel and amd instead of buying these overpriced ddr4 systems.
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Undying:

At this point it would be smart waiting for ddr5 platform from both intel and amd instead of buying these overpriced ddr4 systems.
Smart from performance per $ perspective? I am not so sure. 1st gen will likely not be miraculous, but will cost quite a bit.
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Fox2232:

Smart from performance per $ perspective? I am not so sure. 1st gen will likely not be miraculous, but will cost quite a bit.
First gen is never something spectacular but on a long term worth investing even paying a premium at first. It will stomp current systems no doubt.
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@Undying ... Man I am not sure about you ... but I am always waiting for second or third gen of this things ( DDR5 - CPU Platform ) Even if the new INTEL and AMD will come out I will wait for second iteration ...
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PCIE 5 is pointless, skip to 6.
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I would want one without the small, slower cores. Just the 8 faster cores would be ideal for a gaming rig. I don't want the scheduler assigning gaming tasks to slower cores. Also, DDR5 is going to be hilariously expensive at first I bet. I think I'll see how performance/price plays out. If these CPUs cost $600 and 32gb of DDR5 costs $500 then that's not exactly exciting in my book, especially when a $250 10700K will max any GPU and game for years to come over 1080p.
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Moonbogg:

I don't want the scheduler assigning gaming tasks to slower cores.
thats not how it works. the slower cores aren't x86.
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Moonbogg:

I would want one without the small, slower cores. Just the 8 faster cores would be ideal for a gaming rig. I don't want the scheduler assigning gaming tasks to slower cores. Also, DDR5 is going to be hilariously expensive at first I bet. I think I'll see how performance/price plays out. If these CPUs cost $600 and 32gb of DDR5 costs $500 then that's not exactly exciting in my book, especially when a $250 10700K will max any GPU and game for years to come over 1080p.
I mean, if 1080p (or heck, even 1440p) gaming is your only concern, then there's no exciting news if you have bought any new CPU in last 2/3 years. Adopting new hardware has always been expensive too, so nothing new here. If there is any discussion, it would be only about if the performance improvement can justify the premium we pay for it.
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Moonbogg:

I would want one without the small, slower cores. Just the 8 faster cores would be ideal for a gaming rig. I don't want the scheduler assigning gaming tasks to slower cores. Also, DDR5 is going to be hilariously expensive at first I bet. I think I'll see how performance/price plays out. If these CPUs cost $600 and 32gb of DDR5 costs $500 then that's not exactly exciting in my book, especially when a $250 10700K will max any GPU and game for years to come over 1080p.
I would love to have proper standby like a console, where the computer can keep downloading etc. Of course that's on Windows, but I'm reading that AMD and motherboards might already start supporting Modern Standby. This architecture makes a lot of sense for something like this.
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Undying:

At this point it would be smart waiting for ddr5 platform from both intel and amd instead of buying these overpriced ddr4 systems.
Early DDR5 will be like early DDR4/3/2, nothing compared to the mature products. RAM frequency matters so little anyway compared to GPU and CPU, the industry has way bigger issues at the moment. On-die L3 cache mitigates the impact of slower RAM, I suspect this will only get worse (better?) with future CPU generations.
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just a reminder that intel doesn't benefit from DDR frequency as much as AMD does.
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Astyanax:

just a reminder that intel doesn't benefit from DDR frequency as much as AMD does.
this is true I compared some of the same games that appear in both tests,r5 3600 usually sees 10-15% increase form going from 3000 to 3600 i5 8600k it's 5-10% so both benefit,and noticeably,ryzen gets 4-6% more out of it. https://www.purepc.pl/jaka-pamiec-do-procesora-amd-ryzen-5-3600-test-ddr4-2133-4000?page=0,17 https://www.purepc.pl/test-pamieci-ddr4-2133-3600-mhz-na-intel-core-i5-8600k?page=0,4 it's also worth mentioning 4000 async mode is barely as good as 3400/3200 sync
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DmitryKo:

PCIe 6.0 is not finalized yet. Also M.2 (NVMe) slots will be limited to PCIe 4.0 x4 in both Alder Lake and Meteor Lake, according to WccfTech.
We really need a storage solution that addresses latency/random read/write before going beyond PCIe 4.0X4 matters much anyway. If you compare the 870 EVO to the 980 Pro you see more than a 12X in sequential read but barely a 2X in 4K random. Clearly the interface does not help much on the random side. Optane has too many caveats unfortunately so we need something in between NAND and Optane. Getting 4K random to 160MB/S (effectively double the current best NAND solution) would be a nice goal for PCIe 5.0X4.
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Astyanax:

PCIE 6.0 has almost final draft, and PHY/Receivers are in development.
That's too late for a product released by end of 2021. The final spec should have been released two years prior, and final silicon should have been taped out a year prior.
nosirrahx:

We really need a storage solution that addresses latency/random read/write before going beyond PCIe 4.0X4 matters much anyway. Clearly the interface does not help much on the random side.
NVMe still uses 512 Byte sectors and LBA adressing to match hard disk access patterns of current software. We would need 1) large sectors/clusters and contiguous alocation of free space, and 2) device drivers and software optimised for data access patterns of flash memory disks. BTW Microsoft is planning to bring the DirectStorage API from Xbox Series X to Windows 10 - this will require an NVMe disk for muich improved load times. Details will be available at Game Stack Live event (April 20-21, 2021).
Optane has too many caveats unfortunately
Optane has no caveats when used in disk storage devices, but it's simply too expensive for a consumer PCs. Intel recently cancelled all end-user storage devices and concentrated on server-oriented 'Optane DC' DIMM memory.
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DmitryKo:

That's too late for a product released by end of 2021. The final spec should have been released two years prior, and final silicon should have been taped out a year prior.
Final draft is fine for releasing hardware with, Intel did it with Sandy bridge E Alder lake isn't coming till 2023/2024, so just skip Gen 5.
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Astyanax:

Final draft is fine for releasing hardware
PCIe 6.0 is not at the final draft stage yet - that would be version 0.9, and so far only draft 0.7 has been approved.
Alder lake isn't coming till 2023/2024
No, that's Meteor Lake, a 7 nm node refresh.
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DmitryKo:

NVMe still uses 512 Byte sectors and LBA adressing to match hard disk access patterns of current software. We would need 1) large sectors/clusters and contiguous alocation of free space, and 2) device drivers and software optimised for data access patterns of flash memory disks.
I'll have my hands on a P5800X later this years and I will make sure to do a side by side with it and something like a 980 Pro (or whatever NAND based storage is the king of 4K random at that time). It will be interesting to see just how far NVMe on its own can actually go. Combining something better than NVMe with something better than NAND would obviously be better but for now NVMe is what we have.
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nosirrahx:

I'll have my hands on a P5800X It will be interesting to see just how far NVMe on its own can actually go.
Random access performance would still be limited by the embedded NVMe controller, which has to translate LBA sectors and align all operations to native read/write page size - and as long as disk operations are still based on 512 Byte sectors and 4KByte clusters, even Optane (3D Xpoint) memory wouldn't help random access throughput, in spite of being 3 to 4 orders of magnitude faster than flash memory. FYI there are recent NVMe specification, NVMe Zoned Namespaces (ZNS) with ZNS Command set, a part of upcoming NVMe 2.0. Zones are based on physical flash memory dies; they use sequential writes and append-only write policy with native flash memory write/erase block I/O sizea. This would move garbage collection and wear levelling to the OS, reducing write amplification and overprovisioning, and improve access latencies by eliminating the Flash Translation Layer (FTL). https://nvmexpress.org/new-nvmetm-s...-namespaces-zns-as-go-to-industry-technology/ https://blog.westerndigital.com/nvme-spec-ratification-zns-ssd/ https://www.anandtech.com/show/15959/nvme-zoned-namespaces-explained/3 https://blog.westerndigital.com/what-is-zoned-storage-initiative/ https://zonedstorage.io/introduction/zns/