AMD Zen 4 Based Genoa CPUs Get 1 MB L2 Cache per Core
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Kaarme
Sounds like it will kick ass! Of course it absolutely needs to, considering Intel is back in competition.
tunejunky
this is cementing AMD's status in Enterprise
and i'm sorry for Intel as they aren't going to get any traction outside of legacy customers with less intensive needs.
software defined feature sets will not cut it against this.
TLD LARS
This would confirm AM5 1MB L2 per core also right?
As far as I know cache is not something that previously has had yield problems, so there should not be any leftover desktop chips with half the cache blocked off, unless they are made on a different production line.
schmidtbag
It's kind of funny seeing how 1MB of L2 is considered large again. I had an old Opteron 180 (socket 939) with 1MB of L2 cache per core. Granted, it didn't have an L3 and only 2 cores.
tunejunky
JamesSneed
JamesSneed
Marios145
Athlon Xp Barton introduced the 512KB L2 cache if i recall correctly, which also killed the P4's frequency lead.
Athlon 64 FX introduced 1MB L2 but also costed 1k euros...so idk if that was mainstream.
But those were in a time that L2 was the last level of cache( also process nodes were influencing cache latencies)
L2 size depends on latency penalty, ever since L3 cache became mainstream
Now L3 is the one that gets regular changes and its latency is not the most important metric, as we see with Zen
Valken
What I really want to know is what are the planned 3D cache layouts for Zen 4! It is really between ADL, 5800X3D or Zen4 for gamers who want top performance now!
BLEH!
If it helps boost performance/IPC (alongside that huge L3 cache) - then a win?
user1
tunejunky
user1
tunejunky
user1
Airbud
My core 2 duo e8600 had 6MB L2...but yea, slow by today's standards.
tunejunky