schmidtbag:

Considering it's "infinity", makes me wonder if this is actually supposed to be a shared cache for APUs. Right now, memory bandwidth is the #1 issue for APUs and the caches they have are just simply not sufficient. dGPUs don't really need a fancy cache, since you can just widen the memory bus for a major bandwidth increase.

Undying:

Wider bus increase the cost and power consumption this could great way to increase the bandwidth on igpu and dgpu.

Silva:

Didn't know about the collab part, but it must be expensive too (and hot). AMD has to work with what its available. 256-bit is to make it more affordable and competitive, I hope it's enough to not starve the card.

schmidtbag:

A decently large cache is far more expensive. To my understanding, a wider bus isn't necessarily more power hungry if the total amount of components doesn't go up. So for example, whether you have a 8GB on a 256-bit bus or a 384-bit bus, I don't think the power consumption is going to change much. Maybe I'm wrong - I don't have solid evidence of this, but, the memory chips themselves aren't necessarily working harder. The GPU itself is working harder (and therefore will use more power) because it is provided more bandwidth to prevent downtime, but the same could be said of a larger cache.

cucaulay malkin:

yes,except your expamples don't reflect the scope of this here situation,amd absolutley need that bandwidth,that's why they're introducing this cache - they're lacking bandwidth.

Fox2232:

Having 384-bit bus vs 256 incurs only 50% power draw penalty from entire memory subsystem. And costs proprotionally more for memories + PCB complexity.

schmidtbag:

I don't think I made myself clear: In my hypothetical situation, the amount of memory chips would be the same, but in the lower-bit model, some chips would share the same bus. It doesn't appear this happens often, but it does happen. Take the new A6000 for example, where that has a 384-bit bus despite having 48GB. That very obviously has multiple chips per bus. Therefore, Nvidia could, in theory, double the bus width without affecting the number of memory chips. Doing so would not have as significant of a power increase on the memory subsystem.

ACEB:

All it is is the precursor to chiplets, if you have a large GPU and break its various functions down into several parts you can theoretically design a system like in the video where each chiplet has a specific task and is all interlinked with infinity cache. You keep individual die size low so costs come down, you can design dedicated architectures per GPU function instead of having to tie it all into a single monolithic ever increasing in size GPU which has higher costs and lower yields and uses more power at higher temps. Take an Nvidia design as an example, you could offload the RT cores to its own dedicated chip

schmidtbag:

A decently large cache is far more expensive.

Fox2232:

GDDR6 has 32Gb variant = 4GB per chip.

Exodite:

With the yields TSMC are getting on their 7nm node now, it may just be that cache is both more effective and more economical.

schmidtbag:

According to what? I've only heard about a maximum of 16Gb, which to my understanding isn't even available yet. Remember, we're talking about GDDR6X here. Regardless, I doubt there's a major power difference in using a single 4GB chip vs a pair of 2GB chips sharing the same bus, assuming all else is the same. Indeed it will be, but it's still disproportionately a lot more expensive than VRAM. Otherwise, what's the point of having VRAM?

schmidtbag:

Indeed it will be, but it's still disproportionately a lot more expensive than VRAM. Otherwise, what's the point of having VRAM?

Exodite:

Increasing bus width is incredibly expensive, due to the added complexity of the boards. You may need more components and the additional traces will mean relocating other components, using boards with higher layer counts, using more complex cooling solutions and so on.

Kaarme:

What happened to make it so expensive?

wavetrex:

Milking, man, milking. Nvidia realized that customers are willing to pay more and more and more for virtually the same BOM. AMD simply followed suit...