While it remains to be seated under the rumor tag, kopite7kimi, acknowledged a miscalculation in their earlier analysis, having incorrectly applied the L2 cache and memory controller ratio from the Ada Lovelace architecture to the Blackwell series, leading to the erroneous 512-bit interface assumption for the GB202.
I think I probably made an empirical mistake. I mistakenly applied the ratio of Ada Lovelace's L2 and MC to Blackwell.
Emerging details suggest that the GB202 may incorporate GDDR7 memory, a step up from the existing GDDR6X, as per Micron's planned production timeline. GDDR7 is anticipated to offer a maximum bandwidth of 32Gbit/s per pin, which would mark a significant improvement over the 24Gbit/s maximum of GDDR6X. With a 384-bit bus, this new GPU could see bandwidths exceeding 1.5TB/s.
On the computational front, the GB202 is reported to potentially feature up to 24,576 CUDA cores, outstripping the AD102's core count found in the RTX 4090. This indicates a notable enhancement in processing power. The manufacturing process for the GB202 is expected to be TSMC's 3nm technology, though the exact variant is yet to be confirmed.
With the transition to a 384-bit memory bus, earlier conjectures pointed towards the continued use of GDDR6X. However, the shift to GDDR7 could deliver a significant throughput increase, marking a technological leap forward. For example, leveraging Micron's 32GT/s 16 Gb chips could result in a bandwidth of approximately 1.536 TB/s, a substantial gain over the RTX 4090's bandwidth of 1.008 TB/s. Memory capacity for the highest-end model within this GPU line is expected to remain at 24 GB.
Further specifics about Nvidia's GB202 GPU are anticipated to be disclosed in the coming months, possibly at the GTC event scheduled for March next year.