The significant wafer usage by HBM memory is attributed to its complex stacked architecture, which connects multiple layers of DRAM memory using Through-Silicon Vias (TSVs). The process's inherent challenge is that a defect in any layer results in the discard of the entire stack, leading to a yield rate for HBM that is currently only about two-thirds that of conventional memory products.

The demand for HBM has surged, particularly due to its applications in the AI sector, leading to a tight market. Industry peers such as SK Hynix have reported their HBM production capacities for the year are already fully allocated, with Samsung having secured most of its annual production capacity through quota negotiations. Micron has now also indicated that its production capacity for HBM is essentially reserved for the next year.

This increased allocation for HBM production is impacting the availability of other DRAM types, with Micron reporting a constrained supply for non-HBM memory products. The company has also started mass shipments of its 8Hi HBM3E memory, projecting significant revenue contributions from this product in the fiscal year ending August 2024. Furthermore, Micron revealed progress on a 12-layer 36GB HBM3E variant, with sampling completed earlier in the month and mass production targeted for 2025.