Meanwhile Intel: https://media.giphy.com/media/3s7Jl1xafxWu0qDBoA/giphy.gif

Meanwhile GlobalFoundries believes there's no need for mankind to go beyond 12nm.

Tsmc announced a 1.8x (80% if I read correctly) density increase on 5nm about a week ago compared to the 25percent increase for samsung

Clawedge:

Tsmc announced a 1.8x (80% if I read correctly) density increase on 5nm about a week ago compared to the 25percent increase for samsung

If this turns out to be correct, those are some insane numbers.

cryohellinc:

If this turns out to be correct, those are some insane numbers.

https://www.tomshardware.com/news/tsmc-5nm-euv-process-node,38995.html

with this pace seems samsung dont have issue with the tech (making smaller node) they probably can reach 4nm or smaller by 2022? but i have feeling 5nm is already risky in many ways so even smooth probably we will stuck in 5nm for a while another thing i concern is chip reliability, yes its smaller and easier to cool but we never talk about reliability with new generation chip or not enough time to know if the chip reliable enough or not based what i read so far, up to 14nm seems no issue whatsoever, but seems more people getting their cpu degraded faster than previous-gen-cpu in OC situation, so this interesting to me we dont want smaller chip with short-term-reliability

Clawedge:

Tsmc announced a 1.8x (80% if I read correctly) density increase on 5nm about a week ago compared to the 25percent increase for samsung

Yeah, but that is compared to their own 7nm process. Since each Fab maintains their own definition of what exactly is meant by a process level (so 7nm for TSMC is not necessarily the same as 7nm for Samsung) it's hard to gauge what this really means compared to Samsung's improvement.

Crazy Joe:

Yeah, but that is compared to their own 7nm process. Since each Fab maintains their own definition of what exactly is meant by a process level (so 7nm for TSMC is not necessarily the same as 7nm for Samsung) it's hard to gauge what this really means compared to Samsung's improvement.

True, 80% improvement from crap, is not the same as 25% improvement in an already great product.

The thing with the gains its usually in the high-density process which is used to make things like DRAM where the high performance process is used to make CPU's. The minimum feature size doesn't mean a ton either since like say TSMC's first 7nm LPP process was 80% 10nm and 20% 7nm. Another example is Samsung's 7nm LPP process was by far the most dense even compared to Intel's 10nm however it is a high density process that isn't well suited to CPU's however will be great for DRAM. For high performance they all have to make sacrifices on gate length, fin pitches etc. I know everyone who really needs to know understands all of this it would be nice for someone to translate it to lamens terms for the rest of us. If an engineer could make bar charts for high performance and one for high density that would be lovely.