Intel Unveils Full Specs Core X-series Processor Family Specs 14- to 18-Core

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....powered by up to 18 cores and 36 threads. And, with up to 68 PCIe 3.0 lanes on the platform...... Wtf?
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....powered by up to 18 cores and 36 threads. And, with up to 68 PCIe 3.0 lanes on the platform...... Wtf?
Beat me to it. I think that should read 44, or the chart is wrong somewhere...
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....powered by up to 18 cores and 36 threads. And, with up to 68 PCIe 3.0 lanes on the platform...... Wtf?
They quickly added the chipset lanes ... it's 44 for the 10 to 18 core CPUs and then 24 on the chipset. However Intel seems to be forgetting to mention that the DMI uplink runs over a x4 Gen 3.0 lanes 😉
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Wait so there's multiple turbo settings now? I assume the 3.0 is only for maybe 1-2 cores, and the 2.0 spreads across more cores?
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com on! its only 44 lanes, the ones on the board do not count. this is some cheap marketing stunt, what is wrong with intel? or is this just a typo @guru3d?
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com on! its only 44 lanes, the ones on the board do not count. this is some cheap marketing stunt, what is wrong with intel? or is this just a typo @guru3d?
Nono, that's an official Intel press-release you are reading mate.
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Wait so there's multiple turbo settings now? I assume the 3.0 is only for maybe 1-2 cores, and the 2.0 spreads across more cores?
Basically it is one thread only combined with a software mode. TB3 can be software configured to give applications priority towards the best available thread. So if you put say Chome in the priority list, then there is some prediction going on making sure that that software will get the best thread with the TB3 boost.
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Its 44 lanes from the CPU, 24 lanes from the X299 chipset running through the X4 DMI chipset. The DMI shares bandwidth from the 24 lanes overs its PCIE 3.0 x4 lane connection hence total effective lanes with full bandwidth are 44 + 4 = 48. x399 on the other hand has 4 lanes from the chipset and another full bandwidth 60 lanes. effectively 64 full bandwidth lanes. Highly confusing for buyers who don't dig too deep.
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Extreme Performance NEW! :puke2:
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Extreme Performance NEW! :puke2:
12 years old?
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Intel is great at marketing... Any enthousiast, which this platform is meant for, wil see right trough its BS with PCIe lanes. Let alone the pricing which is still ridiculous. And they're still labeling it for Extreme Gaming. Which in my honest opinion and according to several benchmarks is still nonsense. But hey, it sells I gues... At computex this was THE panic reaction to AMD's threadripper, and it still is. They have somehow not really managed to offer something genuine for what it costs, and again, the marketing on this stinks.
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To me for a comparison, the 7980XE is a really fast super car made by Lamborghini or Ferrari. The 1950X from AMD is a Nissan GTR, it is cheaper in price but equal or better in performance.
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Seriously Intel is in full douche mode since they have competition. I wish AMD would send Intel one of the Threadripper review kits with a custom logo printed "Elmer's" just to poke them a bit. Joking aside I am curious how Threadripper stacks up in the 16 core vs 16 core I have a real suspicion AMD is going to pull ahead due to thermals unless Intel decides TIM is bad all the sudden.
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its only 44 lanes, the ones on the board do not count. this is some cheap marketing stunt, what is wrong with intel? or is this just a typo @guru3d?
Just being devil's advocate: Threadripper is advertised to have 64 PCIe lanes, but it actually has 60, with 4 of them being part of the chipset. Obviously, 4 is a lot less glaring than 24, and TR ought to have more consistent performance between each PCIe slot.
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Basically it is one thread only combined with a software mode. TB3 can be software configured to give applications priority towards the best available thread. So if you put say Chome in the priority list, then there is some prediction going on making sure that that software will get the best thread with the TB3 boost.
So it's a scheduler?
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My last gen i7 6850K has 40 pcie lanes with 3.6ghz base clock and 4.0ghz turbo with 6 cores/12 threads and 15mb L3 cache. Many of the processors on that list look like gimped versions compared to my CPU. I am definitely not gonna downgrade to the X299 platform.
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My last gen i7 6850K has 40 pcie lanes with 3.6ghz base clock and 4.0ghz turbo with 6 cores/12 threads and 15mb L3 cache. Many of the processors on that list look like gimped versions compared to my CPU. I am definitely not gonna downgrade to the X299 platform.
Definitely not gimped, but there is literally zero reasons to 'upgrade' x99 to x299
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Just being devil's advocate: Threadripper is advertised to have 64 PCIe lanes, but it actually has 60, with 4 of them being part of the chipset. Obviously, 4 is a lot less glaring than 24, and TR ought to have more consistent performance between each PCIe slot.
But is the link between the CPU and chipset 4 as well? because if so, that's still 64 total, where as Intel as 44, with an additional of 24 @ the speed of 4,or AKA 48, unless i'm misunderstanding the issue here.
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Definitely not gimped, but there is literally zero reasons to 'upgrade' x99 to x299
totaly agree... even more if you are on C*** chipset (for xeon)
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But is the link between the CPU and chipset 4 as well? because if so, that's still 64 total, where as Intel as 44, with an additional of 24 @ the speed of 4,or AKA 48, unless i'm misunderstanding the issue here.
Link meaning what? Threadrippers are explicitly 60 lanes on the CPU and 4 from the chipset, totalling in 64 lanes. To my knowledge there aren't any more lanes than that, from anywhere - that's all you're getting (not like that's a small amount of lanes...). According to the article, Intel offers a total of 68 lanes, 44 from the CPU and 24 from the chipset, all of which operate at 3.0 speeds. I'm not sure what you mean by "24 @ the speed of 4". 24 PCIe 3.0 lanes means you could have a x16 slot and a x8 slot. If you were to combine the chipset's resources with the CPU, you could have four x16 slots and one M.2 (x4) slot. Note these would all be running at full bandwidth. Regardless - this is just Intel's way of saying "ha-ha we're better because we have slightly more of a number that makes literally no difference but people will buy into it anyway!" and yet AMD's Epyc is supposed to have 128 lanes. I thought 64 lanes was overkill.