AMD Ryzen Die Shot and Caches Shown at ISSCC

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Now all we need is a Guru3D review with no stones left unturned.
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Now all we need is a Guru3D review with no stones left unturned.
Yes... Hilbert. Turn every stone please. 😛
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"Design for reuse", they will quit the lv3 cache on APUs xD but if they performs well :3
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So what do you guys make of those die-shots? I have no idea what I am looking at but I know some people can tell alot just looking at pics! Is this going to be a good cpu and mostly will it compete with intel in gaming benchmarks?
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So what do you guys make of those die-shots? I have no idea what I am looking at but I know some people can tell alot just looking at pics! Is this going to be a good cpu and mostly will it compete with intel in gaming benchmarks?
Well keep in mind there are millions (maybe billions) of transistors, so even the best electrical engineers can't REALLY tell what they're looking at. But what I can tell personally is it looks very "messy" compared to dies of other CPUs. Most dies seem to have very clean and consistent patterns, where they almost look like farm fields from above. But this seems to have a lot of unevenly sized chunks that are scattered all over the place, except for the L3 cache - that seems pretty clean. The messy-ness doesn't mean that's a bad thing though. The components could be organized in a very specific and deliberate way that maximizes efficiency.
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Well keep in mind there are millions (maybe billions) of transistors, so even the best electrical engineers can't REALLY tell what they're looking at. But what I can tell personally is it looks very "messy" compared to dies of other CPUs. Most dies seem to have very clean and consistent patterns, where they almost look like farm fields from above. But this seems to have a lot of unevenly sized chunks that are scattered all over the place, except for the L3 cache - that seems pretty clean. The messy-ness doesn't mean that's a bad thing though. The components could be organized in a very specific and deliberate way that maximizes efficiency.
I guess you have a point lol? I cannot tell anything looking at die shots from either camp and I even tried to keep-up with people talking about it ( clueless) haha. I guess soon enough we will know if Ryzen is the real deal or not.
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the FPU & scheduler are enormous. also that cache layout is sexy as **** for some reason...
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Well keep in mind there are millions (maybe billions) of transistors, so even the best electrical engineers can't REALLY tell what they're looking at. But what I can tell personally is it looks very "messy" compared to dies of other CPUs. Most dies seem to have very clean and consistent patterns, where they almost look like farm fields from above. But this seems to have a lot of unevenly sized chunks that are scattered all over the place, except for the L3 cache - that seems pretty clean. The messy-ness doesn't mean that's a bad thing though. The components could be organized in a very specific and deliberate way that maximizes efficiency.
because the die shot is not made for be clear. this was part of the material shown to ISCC conference concerning the metal layers, production on the die.. They have keep everything in dark and clear blue and only highlight some parts for show them during the presentation... They dont wanted shown so early a complete picture of the die.. It have been posted last sunday on beyond3D ( thanks Hoom ) It was at same presentation they posted this, should remember it it was posted by HH allready: http://pc.watch.impress.co.jp/img/pcw/docs/1043/349/5.jpg http://pc.watch.impress.co.jp/docs/column/kaigai/1043349.html