PLC (5-bits per cell written) Based SSDs will be arriving to the market, but only after 2025

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We have serious doubts about the technology, as even QLC is already a bit too much for most people (pardon the pun). For SSDs SLC is one bit written oper NAND flash cell, MLC is two bits, TLS is three-bits,  QLC 4 bits per cell. There are plans to introduce PLC SSDs, writing a staggering 5 bits per cell0.

Now Western Digital has mentioned in an interview that it will not release SSDs with PLC memory until 2025 at the earliest, but that does mean the company is actively developing it. The company has been working with Kioxia (previously Toshiba) since at least 2019 on this type of NAND flash writing. Each cell needs to store 32 voltage states for this, while triple-level cell SSDs, for example, require only eight.

WD's chief of technology and strategy, Siva Sivaram, believes the technology won't hit the market until the second half of this decade, and only for some very specific segments in the market.


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