Set for a 2024 release, Arrow Lake-S represents Intel's forthcoming Core generation for desktops. Accompanying this 15th generation, a new socket, LGA1851, is anticipated, increasing the pin count by 151 from its antecedent. Benchlife.org provides a graphic depicting this layout.
The new socket, LGA1851, maintains the LGA1700's dimensions, at 45x37.5 millimeters. The pin pitch remains consistent, though there's an enhancement in contact density. Adjustments in the heat spreader's height, from 6.73 to 7.4 millimeters, will facilitate stacked chiplets. Existing CPU coolers compatible with LGA1700 are expected to fit LGA1851, with mounting distances retained. Notably, the maximum contact pressure for LGA1851 will experience an 89% increment from LGA1700. Intel is projected to back the LGA1851 socket with subsequent CPUs until 2026, potentially supporting processors like Lunar Lake and Panther Lake. The 2026-slated Beast Lake/Nova Lake processors might also be congruent.
New insights about Arrow Lake-compatible processors suggest a significant boost in the L2 cache for the P cores. From Skylake's 256 Kbytes L2 cache per core, subsequent generations witnessed steady increments. Rocket Lake had 512 KB, Alder Lake had 1.25 MB, and Raptor Lake carries 2 MB per core. Remarkably, Arrow Lake is projected to outfit P cores with an ample 3 MB L2 cache, enhancing performance by facilitating swifter data set access. This performance jump can partly be attributed to the transition to the efficient 3nm production process.
Intel's roadmap suggests LGA1851 will embrace DDR5 RAM, reaching speeds as high as 7500 megahertz. This surpasses LGA1700 and Raptor Lake Refresh, which tops out at 5600 megahertz, indicating a phasing out of DDR4 RAM. Modifications are forthcoming for PCIe lanes. The intention is to integrate an additional four connection lines, harnessing all 20 PCIe 5.0 lanes. Present Intel CPUs, while having 20 lanes, can only employ 16 concurrently. This change allows simultaneous, optimal connections for both a graphics card and an M.2 SSD. An M.2 SSD's connection via the CPU presently reduces the graphics card interface to 8 lanes. There's also an expected rise in PCIe 4.0 lanes, facilitating the linkage of another 4.0 SSD with four lanes. Despite not equalling AMD's AM5 socket, this is a considerable progression, permitting a connection of at least two PCIe 5.0 SSDs with four lanes each.
