GobalFoundries 12LP+ FinFET solution ready for production

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Wait GloFo is still alive? What do they do, broadcom wifi cards?
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FrostNixon:

Wait GloFo is still alive? What do they do, broadcom wifi cards?
Quote from Ceo "Gary Patton: There’s absolutely an increase in the R&D for these other areas. Now that we’re relieved from the burden of having to fund this bleeding edge stuff, we’re able to redirect dollars and resources toward these other areas…. We did do a resource action and we are cutting back our development corps here in Malta. But doing differentiated strategy around 14-nm and 12-nm, it requires some significant resources, and we’ve moved people over to that. But it’s nowhere near the scale of this crazy bleeding edge stuff of 7-nm and beyond."
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Never heard of GobalFoundries...
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A few days late and some NM short.... I'll keep with what AMD is and had been dishing out.
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This is good that they at least hang around even if its on the older nodes to relieve the higher end 7nm nodes it should help with keeping costs down for devices that don't need the shrink.
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FrostNixon:

Wait GloFo is still alive? What do they do, broadcom wifi cards?
Yeah, that might be a good example. IC business is huge. Not nearly all applications need the absolute top of the line CPUs and GPUs. Electronic devices are everywhere, in the consumer and industrial markets. As long as it's something more complicated than a toaster, it's likely to have some integrated circuits (though some toasters might have them already). I suppose GF is targeting the mid-range customers, not those who want simple ICs costing a cent at max, not those like AMD or Nvidia or the higher performance smartphone market, but manufacturers who need somewhat complicated chips but not at the bleeding-edge prices. I suppose feature phones and entry level smartphones would be good examples as well.
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Although I dislike their strategy to drop R&D on 7nm, it's great to see them still improving existing technologies. If they have production capacity sold, it's not a bad strategy to invest on those instead of sinking billions on the uncertain. Paving the way is really expensive, and TSMC is gambling hard investing billions to be upfront. Intel failed with 10nm and probably cost them millions in R&D and lost market share. If GF was failing with their 7nm approach, the decision they made was the right one. That said, they'll eventually have to move on to smaller nodes. Either purchasing IP or developing their own, no one can stay behind for too long. Either that or they'll be making chips for calculators in a couple of years.
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Anyone else getting rather bored of how buzzwordy AI has become? Seems if you want to stand out at all as a technology company, you MUST use AI in your marketing somehow, regardless of relevancy. Anyway, although I'm sure they've got plenty of customers at 12nm, I think they need to be a bit more aggressive in their developments. Even though AMD uses 12nm for their IO dies, those dies are pretty chunky, and could potentially be taking up space that they could use for more cores, a bigger iGPU, or perhaps built-in HBM2. From what I recall, AMD does use GF for these dies, but I don't know if they can stick with 12nm for long.
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@schmidtbag AMD said IO doesn't scale well with node so making it cheaper would benefit both them and the consumer. They didn't need the extra space anyway for Zen 2, so going that route was the best of both engineering and economics. That said, they had a big contract with GF for their production and could not afford cancel. As Ryzen needed to move forward in node (for competition sake) and GF wouldn't have a 7nm one, TSMC 7nm was chosen. It's true that IO die is taking up enormous space (not relevant on sTRX4 but very much so on AM4), I predict that as soon as possible it will transit to 7nm: probably with Zen 4 on 5nm.
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Silva:

@schmidtbag AMD said IO doesn't scale well with node so making it cheaper would benefit both them and the consumer. They didn't need the extra space anyway for Zen 2, so going that route was the best of both engineering and economics. That said, they had a big contract with GF for their production and could not afford cancel. As Ryzen needed to move forward in node (for competition sake) and GF wouldn't have a 7nm one, TSMC 7nm was chosen. It's true that IO die is taking up enormous space (not relevant on sTRX4 but very much so on AM4), I predict that as soon as possible it will transit to 7nm: probably with Zen 4 on 5nm.
If the thing about the contract is true, I wonder what kind of rank amateur was the one negotiating the contract. You'd think there would have been a clause in the contract stipulating GF must remain competitive in the market for the contract to apply. So, when GF abandoned the 7nm race, a sensible contract would have been void. That being said, perhaps there is such a clause, but it had a very lax time limit.
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Silva:

AMD said IO doesn't scale well with node so making it cheaper would benefit both them and the consumer. They didn't need the extra space anyway for Zen 2, so going that route was the best of both engineering and economics. That said, they had a big contract with GF for their production and could not afford cancel. As Ryzen needed to move forward in node (for competition sake) and GF wouldn't have a 7nm one, TSMC 7nm was chosen. It's true that IO die is taking up enormous space (not relevant on sTRX4 but very much so on AM4), I predict that as soon as possible it will transit to 7nm: probably with Zen 4 on 5nm.
Yeah, the IO die doesn't really do anything computationally expensive relative to the cores, so I can see how it was more economical to just stick with 12nm. I don't necessarily think there was a problem with them using 12nm for that, but rather, they're going to need to shrink that die if they intend to do more. That being said, for now they don't need the extra space on TR or Epyc, but if they intend to add more than 64 cores, they're going to need more space. The IO die for those are so big that they might actually be a bit cost ineffective. Seems to me the price of each die is correlated with the total area of the die. I can think of 2 reasons for this: 1. A bigger die means fewer usable chips can be made per-wafer. Remember, the wafers are circular, so anything that gets cropped by the circle is basically rendered useless. I can't imagine these wafers are cheap. 2. The bigger the die, the more likely there will be an imperfection. I'm not sure you can bin these IO dies since AMD seems to only have 2 variants of them. That means a faulty die isn't an option, making faults more costly. So, although the IO die might not really gain much of a functional benefit from a smaller node, it will allow for other improvements.
Kaarme:

If the thing about the contract is true, I wonder what kind of rank amateur was the one negotiating the contract. You'd think there would have been a clause in the contract stipulating GF must remain competitive in the market for the contract to apply. So, when GF abandoned the 7nm race, a sensible contract would have been void. That being said, perhaps there is such a clause, but it had a very lax time limit.
Well, that kinda did happen. AMD wanted 7nm, GF was like "nah", and so AMD moved their CPU core production to TSMC. To my recollection, they went to GF entirely for Zen and Zen+.
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schmidtbag:

1. A bigger die means fewer usable chips can be made per-wafer. Remember, the wafers are circular, so anything that gets cropped by the circle is basically rendered useless. I can't imagine these wafers are cheap. .
Why can't they make them square? I know nothing about this process but i understand what your saying about the circle.
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SplashDown:

Why can't they make them square? I know nothing about this process but i understand what your saying about the circle.
Good question - I've wondered the same.
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SplashDown:

Why can't they make them square? I know nothing about this process but i understand what your saying about the circle.
schmidtbag:

Good question - I've wondered the same.
One of the biggest reasons that wafers are round is because they are in that shape from the beginning. The silicon ingots that are used to grow the wafer are circular in shape. This is due to the process of dipping a seed crystal into molten silicon and rotating and slowly extracting as the crystal grows. This is also known as the popular Czochralski method. Since the product is already circular in shape, the wafers are cut into that same shape. While they could be cut into a different shape, it would waste silicon.
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There are still a lot of products being tapped on 12nm, 22nm & even 28nm (and probably bigger node, way bigger). Not every product needs the last cutting edge node. Both Intel & TSMC kept old node to tape out specific products for specific clients (okay Intel is probably still its own client even on older node)
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@Kaarme I don't know how it works but I'd say they simple negotiate the lowest price possible for a certain amount of production. The trade off for a low price is the guarantee that AMD can't back off the deal without paying some kind of compensation. I think the main reason RX590 and Zen+ existed is because of that said acquired production. @schmidtbag Just remembered: wasn't the IO 14nm actually? I think wiki even states 14nm: Wiki Obviously they need to do something about the IO size, that thing is massive. I'm guessing they could split the die in two for Threadriper, to make it more cost effective. As for Ryzen, only going 7nm with the IO and 5nm with the CCX is doing to give them more space. Considering what you've said about the wafer being circular and the imperfections, I think TSMC 14nm has been perfected and +90% of production is working chips. Even the current 7nm is more than a year old and the yields are getting close to perfection. TSMC is supposed to be on +7nm now, things are moving fast with them.