It has been known for some time that Genoa and Bergamo CPUs will utilize Zen 4 cores manufactured using a 5nm technique. Genoa will handle up to 96 cores in addition to DDR5, PCI Express 5.0, and CXL. 

AdoredTV disclosed AMD's internal intentions, which align with the event's public details. Bergamo processors will include up to 128 customizable Zen 4c cores. Previously, AMD did not publicly disclose the number of memory channels and PCI Express lanes; however, 12 DDR5 channels have now been confirmed.

Both the SP5 and SP6 sockets are described in full by new leaks. The latter is designed for EPYC CPUs with fewer cores, less memory channels, and fewer PCI Express lanes. Torino, the generation following Genoa and Bergamo, will similarly operate on SP5 and SP6 connections. This is not surprising, considering AMD is attempting to maintain a single platform for as long as feasible. For SP5 and SP6 sockets, EPYC processors based on the Genoa and Bergamo designs will be introduced. But sockets will support CPUs differently. Socket SP5 is intended for processors with 96 or 128 cores, while socket SP6 is limited to 32 or 64 cores. It appears SP6 will be smaller, as it is designed for processors with TDPs up to 225W.

In addition to possessing fewer cores, SP6 has diminished I/O capabilities. The quantity of DDR5 memory channels has been reduced by half. The number of PCI Express 5.0 and CXL lanes has been lowered to two-thirds of the "earlier" socket.

In addition to the technical facts, AMD's plans demonstrate that the company will continue to implement its 3D cache approach with the Genoa processor. In particular, L3 cache will be increased on Genoa-X CPUs. It will be intriguing to observe the number of layers that AMD adds. In October, Genoa EPYC 7004 CPUs will enter mass manufacturing. Following Bergamo and Genoa-X in February 2023 will be Bergamo and Genoa-X. In April 2023, Zen 4 CPUs for Socket SP6 are anticipated.

Leak: AMD EPYC Processors Genoa-X, New SP6 Socket, and 160 PCIe Lanes