Intel Talks "Lakefield" Foveros Package
Think of a chip designed as a layer cake (a 1-millimeter-thick layer cake) versus a chip with a more-traditional pancake-like design. Intel's Foveros advanced packaging technology allows Intel to "mix and match" technology IP blocks with various memory and I/O elements - all in a small physical package for significantly reduced board size.
The first product designed this way is "Lakefield," the Intel Core processor with Intel hybrid technology.
Industry analyst firm The Linley Group recently named Intel's Foveros 3D-stacking technology as "Best Technology" in its 2019 Analysts' Choice Awards. "Our awards program not only recognizes excellence in chip design and innovation, but also acknowledges the products that our analysts believe will have an impact on future designs," said Linley Gwennap, of The Linley Group.
For its part, Lakefield represents an entirely new class of chip. It delivers an optimal balance of performance and efficiency with best-in-class connectivity in a small footprint - Lakefield's package area measures just 12-by-12-by-1 millimeters. Its hybrid CPU architecture combines power-efficient "Tremont" cores with a performance scalable 10 nm "Sunny Cove" core to intelligently deliver productivity performance when needed and power-sipping efficiency when not needed for long battery life.
These benefits offer original equipment manufacturers more flexibility for thin-and-light form factor PCs, including the emerging dual-screen and foldable screen PC categories.
Recently, three designs have been announced that are powered by Lakefield and were co-engineered with Intel. In October 2019, Microsoft previewed the Surface Neo, a dual-screen device. And later that month at its developer conference, Samsung announced the Galaxy Book S. Unveiled at CES 2020 and expected to ship midyear is the Lenovo ThinkPad X1 Fold.
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Intel's Embedded Multi-die Interconnect Bridge (EMIB) will be part of Foveros chips. What that means for high power chips Intel will be going to chiplets to add more cores much like AMD does versus many layers of stacking. So they can go vertical or with chiplets horizontal. Intel's approach is more elegant than AMD but it is verification AMD's glue was the right direction.
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So it should be called Cakefield!
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Excellent opportunity to introduce a new socket, Intel is playing all the old hits.
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It does sound very useful for low-power chips for small devices, be they embedded or handheld. For high-power chips I'm sure the cooling will be a challenge without Intel's favourite ozone layer destroying industial cooler solutions.