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Guru3D.com » News » Intel Releases Stratix 10 MX FPGA with integrated High Bandwidth Memory DRAM (HBM2)

Intel Releases Stratix 10 MX FPGA with integrated High Bandwidth Memory DRAM (HBM2)

by Hilbert Hagedoorn on: 12/19/2017 09:49 AM | source: | 1 comment(s)
Intel Releases Stratix 10 MX FPGA with integrated High Bandwidth Memory DRAM (HBM2)

Intel today announced the availability of the Intel Stratix 10 MX FPGA, the industry’s first field programmable gate array (FPGA) with integrated High Bandwidth Memory DRAM (HBM2). By integrating the FPGA and the HBM2, Intel Stratix 10 MX FPGAs offer up to 10 times the memory bandwidth when compared with standalone DDR memory solutions.

These bandwidth capabilities make Intel Stratix 10 MX FPGAs the essential multi-function accelerators for high-performance computing (HPC), data centers, network functions virtualization (NFV), and broadcast applications that require hardware accelerators to speed-up mass data movements and stream data pipeline frameworks.

In HPC environments, the ability to compress and decompress data before or after mass data movements is paramount. HBM2-based FPGAs can compress and accelerate larger data movements compared with stand-alone FPGAs. With High Performance Data Analytics (HPDA) environments, streaming data pipeline frameworks like Apache* Kafka and Apache* Spark Streaming require real-time hardware acceleration. Intel Stratix 10 MX FPGAs can simultaneously read/write data and encrypt/decrypt data in real-time without burdening the host CPU resources.

“To efficiently accelerate these workloads, memory bandwidth needs to keep pace with the explosion in data” said Reynette Au, vice president of marketing, Intel Programmable Solutions Group. “We designed the Intel Stratix 10 MX family to provide a new class of FPGA-based multi-function data accelerators for HPC and HPDA markets.”

The Intel Stratix 10 MX FPGA family provides a maximum memory bandwidth of 512 gigabytes per second with the integrated HBM2. HBM2 vertically stacks DRAM layers using silicon via (TSV) technology. These DRAM layers sit on a base layer that connects to the FPGA using high density micro bumps. The Intel Stratix 10 MX FPGA family utilizes Intel’s Embedded Multi-Die Interconnect Bridge (EMIB) that speeds communication between FPGA fabric and the DRAM. EMIB works to efficiently integrate HBM2 with a high-performance monolithic FPGA fabric, solving the memory bandwidth bottleneck in a power-efficient manner.

Intel is shipping several Intel Stratix 10 FPGA family variants, including the Intel Stratix 10 GX FPGAs (with 28G transceivers) and the Intel Stratix 10 SX FPGAs (with embedded quad-core ARM processor). The Intel Stratix 10 FPGA family utilizes Intel’s 14 nm FinFET manufacturing process and incorporates state-of-the-art packaging technology, including EMIB.



Intel Releases Stratix 10 MX FPGA with integrated High Bandwidth Memory DRAM (HBM2)




« Ubisoft Extends Free Game Giveaway WIC, AC IV Black Flag and Watch Dogs · Intel Releases Stratix 10 MX FPGA with integrated High Bandwidth Memory DRAM (HBM2) · Guru3D Rig of the Month - December 2017 »

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Evildead666
Senior Member



Posts: 1301
Joined: 2003-09-14

#5502702 Posted on: 12/19/2017 03:20 PM
So this FPGA taks two stacks of HBM2.

This DLU takes six stacks of HBM2.
http://www.guru3d.com/news-story/fujitsu-releases-details-of-new-ai-processor.html
edit : Did see a photo of this DLU without the heatspreader. Will see if i saved it at home later.

with Nvidia and the GV100, and the AMD Vega's, thats a lot of people after HBM2....No wonder there was a short supply.

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