Intel Core i9-10900K 10-core Processor and Z490 Chipset Rumored to be released April 2020
Intel Gen 10 Comet Lake processors, based on Intel's 14nm process and an underlying microarchitecture that is Skylake is next year's desktop processor series from Intel. It makes a step towards 10-core processors with Intels Core i9-10900 that has 10C/20T fabbed at 14nm+++ and due for release in April, with a Z490 chipset.
Intel's next-generation Z490 chipset powered motherboards and 10th Gen Comet Lake-S CPUs are expected to arrive in April 2020. The news comes from HKPEC who has received details from industry insiders and is expecting the new chipset to bring a substantial update.
The release involves the next-gen processor line and their respective LGA1200 socket based chipsets. There is a pin count change and that this, of course, requires a new processor socket; meet socket LGA1200 as opposed to the current socket LGA1151. Likely current coolers can and will fit though. The new chipsets would be named H410, Q470, Z490, and W480. The Q470 and W480 chipsets would be aimed at embedded devices, H410 would become available for consumer motherboards as embedded, however, of course, would not be pin-compatible with the W480 and Q470 chipsets. Z490 is likely to support the 'our thang' that fast, the furious and overclockable chips in that enthusiast range.
- Up To 10 processor cores for enhanced performance
- Up To 30 PCH-H High-Speed I/O lanes for port flexibility
- Up To 40 PCIe 3.0 Lanes (16 CPU, up to 24 PCH)
- Media & Display features for premium 4K content support
- Integrated + Discrete Intel Wireless-AC (Wi-Fi/BT CNVi) Support
- Intel Wi-Fi 6 (Gig+) Support
- Enhanced Core and memory overclock
- Integrated USB 3.2 Gen 2x1 (10 Gb/s) support
- Intel Rapid Storage Technology (Intel RST)
- Programmable (Open FW SDK) Quad-Core Audio DSP
- C10 & S0ix Support for Modern Standby
The new Intel processors will stick to 16 PCIe lanes and the slides do indicate that to be PCIe Gen 3.0, then another 24 lanes for the chipsets and inbetween a DMI 3.0 link, that would be a 4 lane interconnect. WCCFTech, who leaked the info you see below, indicates that Intel wants to introduce models with ten cores and twenty threads. The fastest Core i9 mentioned is handed out a handsome turbo of 5.1 GHz (that is a single core value). The base clock is 3.0 GHz. You'll notice in the tables below that the Core i7 models will have eight cores and 16 threads, and the i5 six cores with hyperthreading. What is interesting to observe is the relatively low TDP assigned to even the fastest parts, 65 Watts.
Core / thread | Base clock | Boost clock | L3 cache | TDP | |
Intel Core i9 10900K | 10/20 | ? | ? | 20 MB | ? |
Intel Core i9 10900 | 10/20 | 3.0 GHz | 5.1 GHz | 20 MB | 65W |
Intel Core i9 10900T | 10/20 | 2.0 GHz | 4.5 GHz | 20 MB | 35W |
Intel Core i7 10700K | 8/16 | ? | ? | 16 MB | ? |
Intel Core i7 10700 | 8/16 | 3.0 GHz | 4.8 GHz | 16 MB | 65W |
Intel Core i7 10700T | 8/16 | 2.0 GHz | 4.4 GHz | 16 MB | 35W |
Intel Core i5 10500K | 6/12 | ? | ? | 12 MB | ? |
Intel Core i5 10500 | 6/12 | 3.2 GHz | 4.3 GHz | 12 MB | 65W |
Intel Core i5 10500T | 6/ 12 | 2.3 GHz | 3.7 GHz | 12 MB | 35W |
Intel Core i3 10100K | 4/8 | ? | ? | 8 MB | ? |
Intel Core i3 10100 | 4/8 | 3.2 GHz | 3.8 GHz | 8 MB | 65W |
Intel Core i3-10100T | 4/8 | 2.3 GHz | 3.6 GHz | 8 MB | 35W |
Intel Pentium G6400 | 2/4 | 3.8 GHz | 3.8 GHz | 4 MB | 65W |
Intel Pentium G6400T | 2/4 | 3.2 GHz | 3.2 GHz | 4 MB | 35W |
Intel Celeron G5900 | 2/2 | 3.2 GHz | 3.2 GHz | 2 MB | 65W |
Intel Celeron G5900T | 2/2 | 3.0 GHz | 3.0 GHz | 2 MB | 35W |
| ||||
---|---|---|---|---|
Intel 400 series chipsets | ||||
Chipset Name | Intel Z490 | Intel W480 | Intel Q470 | Intel H410 |
Total HSIO Lanes | 46 Lanes (16 CPI + 30 PCH) | 46 Lanes (16 CPI + 30 PCH) | 46 Lanes (16 CPI + 30 PCH) | 30 Lanes (16 CPI + 14 PCH) |
Total PCIe 3.0 Lanes (CPU + PCH) | Up To 40 (16 CPU + | Up To 40 (16 CPU + | Up To 40 (16 CPU + | 22 (16 CPU + 6 PCIe 2.0) |
Chipset PCIe 3.0 Lanes | Up To 24 | Up To 24 | Up To 24 | 6 (PCIe 2.0 Only) |
SATA 3.0 Ports | Up To 8 | Up To 8 | Up To 6 | 4 |
Maximum USB 3.2 Ports Gen 2 (10 Gb / s) / Gen 1 (5 Gb / s) | 43687 | 43687 | 43626 | 0/4 |
Tota USB Ports (Maximum USB 3.2 Gen 1 (5 Gb / s)) | 14 (10) | 14 (10) | 14 (10) | 10 (4) |
Intel RST Technology For PCIe 3.0 storage ports | 3 PCH | 3 PCH | 3 PCH | 0 |
eSPI | 2 Chip Select | 2 Chip Select | 2 Chip Select | 1 Chip Select |
Overclocking Support | Yes | AFTER | AFTER | AFTER |
Processor PCIe Express 3.0 Lanes Configuration | 1x16 or 2x8 or 1x8 + 2x4 | 1x16 or 2x8 or 1x8 + 2x4 | 1x16 or 2x8 or 1x8 + 2x4 | 1x16 |
Display Support (Ports / Pipes) | 43527 | 43527 | 43527 | 43526 |
DMI 3.0 Lanes | 4 | 4 | 4 | 4 (DMI 2.0 Only) |
System Memory Channels / DPC | 2/2 (DDR4-2666) | 2/2 (DDR4-2666) | 2/2 (DDR4-2666) | 2/1 (DDR4-2666) |
Tables and slides courtesy of Wccftech.
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Senior Member
Posts: 852
Joined: 2015-05-19
Why does Intel still stick to the narrow band DMI3 for the connection of the PCH ?
I find the solution of AMD with the I/O DIE much smarter.
DMI 3.0 isn't too different from the 4x PCIe link that AMD uses for the chipset, except of course that Intel doesn't do PCIe 4.0 yet, so DMI 3.0 is basically a PCIe 3.0 4x link
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Posts: 56
Joined: 2017-12-01
Intel H410
"Total PCIe 3.0 Lanes (CPU + PCH) 22 (16 CPU + 6 PCIe 2.0)"
PCIe 2.0 in year 2020....
I know H410 is a budget chipset but still...
It even says it supports USB 2.0 in the overview picture (yes I know, peripherials don't need anything faster than 2.0, but every USB 3.x is backwards compatible so I don't understand what could be achieved by supporting three generations of USB ports).
Senior Member
Posts: 142
Joined: 2010-05-23
I find hard to believe that any PC users looking to upgrade CPU and Motherboard next year will go for this Intel refresh and thats before you even consider the cost of Intel parts.
Senior Member
Posts: 402
Joined: 2015-02-19
I'll go with AMD setup next year. Nothing new, nothing fast.
Finally Intel tyranny is interrupted
Junior Member
Posts: 6
Joined: 2019-11-21
And will finally be delivered from 2021
Why does Intel still stick to the narrow band DMI3 for the connection of the PCH ?
(And H410 even still is only DMI2 !!!)
Where does the NVME SSD with the PCIe lanes come out?
This is not clear from the block diagram!
I find the solution of AMD with the I/O DIE much smarter. Even if there is again the discussion about the I/O DIE. Sense / Nonsense of the PCIe Gen. 4 Speed breaks loose