Over at the chiphell forums, a block diagram leaked of the AMD X570 Chipset. The diagram is not an official AMD one, however does seem to originate from a motherboard partner, and that does show it all. 

Of course, everybody knows already that X570 will bring PCIe Gen 4.0 slots towards the platform, the diagram, however, confirms that to be managed as a single x16 PCIe Gen 4.0 slot or split up in to x8 gen 4.0 slots, which effectively is the same bandwidth as two x16 Gen 3.0 slots. 

Since graphics PCIe lanes are always tied towards the CPU, that means a Ryzen 3000 proc can manage x16 Gen 4.0 for just graphics. Ryzen 3000 likely has the same number of PCIe lanes available yet double the bandwidth. The proc and chipset are also connected of a four-lane PCIe 4.0 interconnect, (as to what Intel would refer to as DMI). This is again double the bandwidth as to previous designs. So the Ryzen 3000 processor is connected to the X570 chipset using 4 lines of PCI-Express 4.0 x4 (the bandwidth was therefore increased from 8 to 16 GT/s). The system supports four USB 2.0 ports, four USB 3.0 and two USB 3.1 ports, six SATA 6 Gbps sockets, two M.2 sockets, as well as three PCI-Express 4.0 x1 slots and one PCI-Express 4.0 x4 slot (interchangeable with SATA sockets or one M.2).

Some interesting things can be read from the block diagram otherwise, like the name of the chipset being Valhalla, lol. Next, to 16 PCIe Graphics lanes, 4 lanes are allocated to one M.2 NVMe slot and thus the last four serve as interconnecting to the chipset.  If you look closer at the diagram, you'll notice a Valhalla of PCIe lanes available alright, for anything from multiple M2 (full speed) connects, SATA and USB. It'll be a big step forward.

Also, this opens up a new chapter for NVMe storage, think about it, 4x lanes PCIe 4.0 compatible M2 SSDs, in theory, could go up to roughly 7~8 Gb/sec :)

AMD X570 Chipset Blockdiagram Surfaces - Specs - PCIe 4.0 All The Way