TSMC, started its 26th Technology Symposium event, starting with a look forward at the company's upcoming processor technologies. The company presented its 5nm nodes - N5 and N5P, the 4nm N4 node, 3nm N3 node, which will be coming to market over the next couple of years.
The N5 node is in mass production, and it makes use of EUV technology. It promises up to a 30% improvement in power consumption or up to 15% more performance over the current N7 node, along with a 1.8x improvement in logic density. This process node is now in high volume production. TSMC also has an enhanced 5nm node planned called N5P, for production in 2021. This will deliver a 10% improvement in power consumption or a 5% in performance over the N5 node.
The replacement to N5 is N3, TSMC's 3nm node, which will enter risk production in late 2021 and is set to enter high volume production is 2022. TSMC is also planning a 4nm node, N4, for risk production in late 2021 and mass production in 2022, but not much was said about its performance improvements. It's supposed to make migration easier from the N5 node, though.
TSMC Node Scaling
Advertised PPA Improvements of New Process TechnologiesData announced during conference calls, events, press briefings and press releases | ||||||||
TSMC | ||||||||
N7vs16FF+ | N7vsN10 | N7PvsN7 | N7+vsN7 | N5vsN7 | N5PvsN5 | N3vsN5 | ||
Power | -60% | 37% | - | ~17% | 0.55x-45%(1.8x) | - | 0.58x-42%(1.7x) | |
VolumeManufacturing | Q2 2019 | Q2 2020 | 2021 | H2 2022 |
* table courtesy Anandtech