SK Hynix: DDR5 by 2020 and Actively Developing DDR6

While motherboards and procs paired with DDR4 can reach amazing frequencies and latencies these days, SK Hynix is already talking about DDR6, and yes, DDR5 is poised to see a release in 2020.

The 6th gen DDR memory will be able to offers data transmission performance of 12 gigabits per second. WHen talking to The Korea Herald, Kim Dong-kyun, research fellow for DRAM design at SK hynix, forecast that DDR6 will be developed in five or six years.

“We are discussing several concepts of the post DDR5,” he said. “One concept is to maintain the current trend of speeding up the data transmission, and another is to combine the DRAM technology with system-on-chip process technologies, such as CPU,” he added, without offering any additional information.

In late 2018, SK Hynix announced the completion of its first DDR5 RAM chip, which runs at 5200 MT/s at 1.1 Volts. A 16-gigabit DDR5 DRAM supports a data transfer rate of 5.2 gigabits per second, about 60 percent faster than the previous generation, which can process 41.6 gigabytes of data per second. The company is further raising it to 6.4 gigabits per second by 2022.

On the development of DDR5, the memory chipmaker focused on developing a set of element technologies that enable raising the speed while maintaining the operating voltage and removing noise during a high-speed transmission.

“We have developed a multi-phase synchronization technology that enables keeping the voltage during a high-speed operation in a chip at a low level by placing multiple phases within the IP circuit, so the power used on each phase is low but the speed is high when combined,” Dong-kyun said.

The DDR5 SDRAM chip is a reliable solution for automotive memory not only because of its speed but also because of its ability to correct errors. The error correction code, known as ECC, self-detects and retrieves errors in data transfer. Such error-checking protocol is crucial in the future of automotive memory that transfers and processes a vast amount of data inside the brain of a self-driving car.