Samsung Announces Availability of its Silicon-Proven 3D IC Technology
Samsung announced the immediate availability of its silicon-proven 3D IC packaging technology, eXtended-Cube (X-Cube), for today's most advanced process nodes.
Leveraging Samsung's through-silicon via (TSV) technology, X-Cube enables significant leaps in speed and power efficiency to help next-generation applications including 5G, artificial intelligence, high-performance computing, as well as mobile and wearable.
"Samsung's new 3D integration technology ensures reliable TSV interconnections even at the cutting-edge EUV process nodes," said Moonsoo Kang, senior vice president of Foundry Market Strategy at Samsung Electronics. "We are committed to bringing more 3D IC innovation that can push the boundaries of semiconductors."
With Samsung's X-Cube, chip designers can enjoy greater flexibility to build custom solutions that best suit their unique requirements. The X-Cube test chip built on 7 nm uses TSV technology to stack SRAM on top of a logic die, freeing up space to pack more memory into a smaller footprint. Enabled by 3D integration, the ultra-thin package design features significantly shorter signal paths between the dies for maximized data transfer speed and energy efficiency. Customers can also scale the memory bandwidth and density to their desired specifications.
Samsung X-Cube's silicon-proven design methodology and flow are available now for advanced nodes including 7 nm and 5 nm. Building on the initial design, Samsung plans to continue collaborating with global fabless customers to facilitate the deployment of 3D IC solutions in next-generation high-performance applications.
More details on Samsung X-Cube will be presented at Hot Chips, an annual conference on high-performance computing, which will be livestreamed Aug. 16-18.
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@Kaarme
A modern processor has many sections and components in it's design. It's possible to identify witch produces more heat and place them on the top layer so they can be cooled efficiently.
Generally speaking I think I/O produces less heat and can be stacked under the work house of the silicon.
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Hasn't Texas Instruments done this since the Cortex-A8 days? Sure, maybe it didn't pack in as many features, but I thought some of the earlier OMAP CPUs were stacked.
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Yes they call the 3d IC tech "PowerStack" which they started shipping IC's made with PowerStack in 2011.
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Does the technology involve some kind of microscopic heat pipes as well? I always thought stacking the stuff on top of each other would lead to critical problems with heat. Even low-power processors, like those in smartphones, generate more heat than the device can handle, which is indeed a problem with phones. Really low-power stuff in special devices doesn't even need that much processing power or memory to begin with, so I imagine they can be made with any technology no problem.