Over the weekend Intel Skylake Purley Xeon E5 and E7 Slides leaked onto the web, as they where spotted in forums. The slides we are talking about in this news item are about Intel’s upcoming Xeon Skylake Platform: Purley, and the info in these slides are pretty significant.
Purley is the successor to the Nehalem architecture, a platform based on motherboard chipset and thus the processor series. The processor platform will come enable six-channels DDR4, and AVX 512 instruction set and a new 100G OmniPath interconnect. Purley will support for no less than 8 processor sockets and will come with Cannonlake graphics and FPGA integration. The PCH is designed under code-name Lewisburg and it'll ship with new Ethernet controllers, these seem to be 10Gbps !
The Interconnect is totally new and very fast, the Omni-Path Interconnect looks to be fiber-optic technology with bandwidth starting at 100 Gbps for the first revision. The controller steering that Omni-path will be codenamed "Storm Lake." A new 10.4 GT/s UPI interconnect will tie things together communication wise, each socket will get three UPI channels.
Now on the processor side things get tasty, "Purley", the "Skylake" architecture will be the basis for processors running up-to 28 physical CPU cores, with HyperThreading enabled that counts down to 56 logical CPUs (!) The TDP is 45W up-to 165W depending on the processor model of course, and Socket P is the all new socket to use. We already mentioned it, a six-channel (384-bit wide) memory controller is embedded for DDR4 memory running up-to DDR4-2666. These puppies will be built on a 14 nm silicon fab.
Have a peek at the screenshots (click thumbnails), found at the Anandtech forums.