Intel publishes Icelake (Gen11) Integrated Graphics architecture paper - Looks Promising

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Intel quite silently published a paper that details the 11th generation graphics architecture for their integrated GPUs. With Skylake came Gen9 graphics, with Kaby Lake Gen9.5 and with the upcoming 10nm Ice Lake processors (late this year) you may expect integrated graphics with Gen11 iGPUs.

Intel's PDF is a 33 page deep technical document (download) that went into detail on Gen11 graphics. A lot of the info in the presentation was already explained during Intel's Architecture Day event, back in December.

From the look of things, Intel will be pursuing iGPUs offering 1TFLOP, the top tier model GT2 will offer 64 execution units (EUs) and features increased memory compression, larges L3 caches and a Coarse Pixel Shading technique. Mind you that last gen that was 24 EUs. The 64 EUs are split into four partitions, slices at Intel refers them. Each partition/slice is made of two blocks that hold 8 EUs each. Each block then will have an instruction cache and additional load/store hardware. Also included will be Position Only Shading Tile Based Rendering, added display controller improvements, Adaptive Sync support, and a number of other things. It's quite a step forward actually.

On the media side of things Gen11 includes an HEVC encoder with high quality encode and decode support. Intel mentions that by making use of parallel decoders it can either support concurrent video streams or they can be combined to support a single large stream, and this scalable design will allow future hardware to push the peak resolutions up to 8K and beyond. Gen11 graphics for the Icelake 10nm processors will bring Intel a good notch closer to AMD Ryzen APU graphics performance, but'we're quite certain that AMD isn't sitting still either. For us desktop users, IGPs, however, are less important.  Intel lists Gen11 targeting efficiency, performance, advanced 3D and media capabilities, and of course, better gaming experience. 

Ice Lake for mainstream processors could surface end of 2019, but early indications lean more towards 2020. The architecture follows a base design that remains close towards the current Coffee lake generation, however, for Ice Lake at least the L2 cache is expected to double, among other things in an effort to increase IPC.

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