Micron gears up for sub-25nm NAND

Micron is prepping itself to advance its NAND flash process technology to sub-25nm nodes in 2011. Micron Technology is set to advance its NAND flash process technology to sub-25nm nodes in 2011, and is gearing up the development of NAND memory supporting ONFI's soon-to-be available specification called EZ-NAND, according to Kevin Kilbuck, director of NAND market development for Micron.

According to Micron's NAND flash process roadmap, the company expects to enter the sub-25nm technology era in 2011 about one year after mass production of 25nm-made products in mid-2010. The memory maker also looks to develop its charge trap flash (CTF) technology, a replacement option for the current mainstream floating-gate NAND technology.

In terms of applications, Micron has offered managed NAND portfolio that supports the eMMC standard for handset and GPS navigator applications, Kilbuck said. eMMC solutions, seen as an alternative to NOR flash, provide a standard interface specification that minimizes the need for host software to accommodate process node migrations and different chipmakers' NAND flash devices.

Micron is also vying for a piece of the market for portable and consumer electronics applications. Kilbuck revealed the company's plan to introduce new NAND solutions that will feature the EZ-NAND specification. The new chips will operate more like storage media, with an 8Gb device capable of storing 2,000 songs or 7,000 photos like a DVD storage.

ONFI recently announced it has begun work on the new technology specification, which is expected to be completed in the mid-2010 timeframe. EZ-NAND is to build ECC (error checking and correction) into the NAND die rather than the system, which will remove the burden of the host controller to keep pace with the fast-changing ECC requirements of NAND technology.