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Intel Releases Specs Core i3 i3-8121U and it is 10nm Cannon Lake
It's a mobile CPU used in laptops but still, Intel has added the Core i3-8121U to its ARK website, and that is the first chip produced at 10nm. The Core i3-8121U is a dual-core processor with a 2.2 GHz base clock and 3.2 GHz Turbo ability. This is a Hyper-threading enabled SKU and thus offers work on four threads.
What's interesting is that it is a 10nm cannon lake processor, which indicates that Intel is ready to fab 10nm processors in bigger volumes. When it comes to pure specifications, the Core i3-8121U really isn't an improvement compared to the Core i3-8130U, made at 14nm. That is a variant with a GPU and a higher turbo speed of 3.4 GHz, the Core i3-8121U does not get an IGP. The proc a has a cache of 4 MB also, totally similar. Laptops that use the Core i3-8121U will this require an extra GPU, something like the Radeon RX 540. What is notable is that the Core i38121U supports lpddr4, ergo 16GB laptops are possible.
Thanks, SH SOTN for the news submit.
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schmidtbag
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Senior Member
Posts: 6484
Joined: 2012-11-10
#5547378 Posted on: 05/16/2018 06:26 PM
Part of me wonders if Intel has had 10nm working fine for a while now, but the problem is maybe it can't clock as high (which could also explain why clocks from AMD/GloFo haven't been all that impressive). Seeing as Intel hasn't really improved their architecture's IPC since Haswell, I'm pretty sure shrinking the die to 10nm while sacrificing clock speeds would not look like they're making progress.
However, high clock rates don't really matter in laptops. Intel could still make 10nm mobile chips, where there would only be improvements and no downsides, since high clock speeds are largely irrelevant in mobile devices.
Those 10nm issues. Again 15W TDP and -200MHz turbo.
Part of me wonders if Intel has had 10nm working fine for a while now, but the problem is maybe it can't clock as high (which could also explain why clocks from AMD/GloFo haven't been all that impressive). Seeing as Intel hasn't really improved their architecture's IPC since Haswell, I'm pretty sure shrinking the die to 10nm while sacrificing clock speeds would not look like they're making progress.
However, high clock rates don't really matter in laptops. Intel could still make 10nm mobile chips, where there would only be improvements and no downsides, since high clock speeds are largely irrelevant in mobile devices.
TLD LARS
Senior Member
Posts: 334
Joined: 2017-03-01
Senior Member
Posts: 334
Joined: 2017-03-01
#5547406 Posted on: 05/16/2018 08:01 PM
I really dont undestand this chip, its a low power budget chip without GPU.
Hope to see it against a AMD Ryzen 3 2200U with same core count, roughly same MHz, same TDP and the build in Vega.
This could be a dive in the trashcan to find something to sell, because i think this is the first GPU less Intel laptop CPU, in a long time.
I really dont undestand this chip, its a low power budget chip without GPU.
Hope to see it against a AMD Ryzen 3 2200U with same core count, roughly same MHz, same TDP and the build in Vega.
This could be a dive in the trashcan to find something to sell, because i think this is the first GPU less Intel laptop CPU, in a long time.
slimmy427
Member
Posts: 93
Joined: 2017-01-31
Member
Posts: 93
Joined: 2017-01-31
#5547430 Posted on: 05/16/2018 09:20 PM
Part of me wonders if Intel has had 10nm working fine for a while now, but the problem is maybe it can't clock as high (which could also explain why clocks from AMD/GloFo haven't been all that impressive). Seeing as Intel hasn't really improved their architecture's IPC since Haswell, I'm pretty sure shrinking the die to 10nm while sacrificing clock speeds would not look like they're making progress.
However, high clock rates don't really matter in laptops. Intel could still make 10nm mobile chips, where there would only be improvements and no downsides, since high clock speeds are largely irrelevant in mobile devices.
Maybe someone can clarify this for me. Would the potential limitations of smaller chips/pathways be how common or dirty the electric standards are? To me, limiting through put can make interruptions far more critical. Which could cause the limited boost and frequency ranges as of lately.
I literally have nothing to back this theory but, I'm hoping someone else does
Part of me wonders if Intel has had 10nm working fine for a while now, but the problem is maybe it can't clock as high (which could also explain why clocks from AMD/GloFo haven't been all that impressive). Seeing as Intel hasn't really improved their architecture's IPC since Haswell, I'm pretty sure shrinking the die to 10nm while sacrificing clock speeds would not look like they're making progress.
However, high clock rates don't really matter in laptops. Intel could still make 10nm mobile chips, where there would only be improvements and no downsides, since high clock speeds are largely irrelevant in mobile devices.
Maybe someone can clarify this for me. Would the potential limitations of smaller chips/pathways be how common or dirty the electric standards are? To me, limiting through put can make interruptions far more critical. Which could cause the limited boost and frequency ranges as of lately.
I literally have nothing to back this theory but, I'm hoping someone else does
schmidtbag
Senior Member
Posts: 6484
Joined: 2012-11-10
Senior Member
Posts: 6484
Joined: 2012-11-10
#5547439 Posted on: 05/16/2018 09:38 PM
Maybe someone can clarify this for me. Would the potential limitations of smaller chips/pathways be how common or dirty the electric standards are? To me, limiting through put can make interruptions far more critical. Which could cause the limited boost and frequency ranges as of lately.
I literally have nothing to back this theory but, I'm hoping someone else does
I'm not sure I 100% understand what you're asking, but there are 2 things to worry about when you shrink the transistors to these sizes:
1. I get the impression that the smaller you go, there's a greater chance of impurities making something fail. Think of it like potholes in the road - if you're driving a big truck, the wheels are large enough that it won't really affect the ride much. The pothole may limit how fast you can go, but you can still drive over it. Meanwhile if you drive a Mini Cooper with those tiny wheels, that pothole could cause some serious damage when going at the same speed as the truck.
2. Quantum tunneling (where electrons start passing through transistors even when the gate is supposed to be closed). To my understanding, the higher the voltage, the more likely this problem will occur. But, voltage tends to correlate to frequency. So, as you can imagine, frequency has to be limited to sustain stability.
As far as I'm aware, the cleanliness of the voltage source itself isn't much of an issue. Modern VRMs are pretty accurate and go through multiple phases.
Maybe someone can clarify this for me. Would the potential limitations of smaller chips/pathways be how common or dirty the electric standards are? To me, limiting through put can make interruptions far more critical. Which could cause the limited boost and frequency ranges as of lately.
I literally have nothing to back this theory but, I'm hoping someone else does
I'm not sure I 100% understand what you're asking, but there are 2 things to worry about when you shrink the transistors to these sizes:
1. I get the impression that the smaller you go, there's a greater chance of impurities making something fail. Think of it like potholes in the road - if you're driving a big truck, the wheels are large enough that it won't really affect the ride much. The pothole may limit how fast you can go, but you can still drive over it. Meanwhile if you drive a Mini Cooper with those tiny wheels, that pothole could cause some serious damage when going at the same speed as the truck.
2. Quantum tunneling (where electrons start passing through transistors even when the gate is supposed to be closed). To my understanding, the higher the voltage, the more likely this problem will occur. But, voltage tends to correlate to frequency. So, as you can imagine, frequency has to be limited to sustain stability.
As far as I'm aware, the cleanliness of the voltage source itself isn't much of an issue. Modern VRMs are pretty accurate and go through multiple phases.
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Those 10nm issues. Again 15W TDP and -200MHz turbo.