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Samsung and Qualcomm Working on 7nm EUV Process Technology
Samsung announced the intention to expand their decade-long foundry relationship into EUV (extreme ultra violet) lithography process technology, including the manufacture of future Qualcomm Snapdragon 5G mobile chipsets using Samsung’s 7-nanometer (nm) LPP (Low Power Plus) EUV process technology.
Qualcomm anticipates that its future Snapdragon 5G mobile chipsets will use Samsung’s 7nm LPP EUV process technology. Using 7LPP EUV process technology, Snapdragon 5G mobile chipsets will offer a smaller chip footprint, giving OEMs more usable space inside upcoming products to support larger batteries or slimmer designs. Process improvements, combined with a more advanced chip design, are expected to bring significant improvements in battery life. Last May, Samsung introduced 7LPP EUV, its first semiconductor process technology to use an EUV lithography solution. It is anticipated that EUV lithography deployment will break the barriers of Moore’s law scaling, paving the way for single nanometer semiconductor technology generations.
Compared with its 10nm FinFET predecessors, Samsung’s 7LPP EUV technology not only greatly reduces the process complexity with fewer process steps and better yield, but also allows up to a 40 percent increase in area efficiency with 10 percent higher performance or up to 35 percent lower power consumption.
“We are excited to lead the 5G mobile industry together with Samsung,” said RK Chunduru, senior vice president, supply chain and procurement, Qualcomm Technologies, Inc. “Using 7nm LPP EUV, our new generation of Snapdragon 5G mobile chipsets will take advantage of the process improvements and advanced chip design to improve the user experience of future devices.”
“We are pleased to continue to expand our foundry relationship with Qualcomm Technologies in 5G technologies using our EUV process technology,” said Charlie Bae, Executive Vice President of Foundry Sales and Marketing Team at Samsung Electronics. “This collaboration is an important milestone for our foundry business as it signifies confidence in Samsung’s leading process technology.”
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Fox2232
Senior Member
Posts: 11371
Joined: 2012-07-20
Senior Member
Posts: 11371
Joined: 2012-07-20
#5522118 Posted on: 02/22/2018 09:25 PM
Very interesting times. It's really hard to comprehend how 20 years ago transistors were ~35x bigger.
I personally think I'll be avoiding sub-7nm products for a little while, until I hear more about reliability and data integrity. Engineers might be able to work around the limitations of physics, but you can't cheat or change physics.
They'll never put it into production unless it has certain level of reliability. As recall of millions of chips from very expensive devices may put foundry under.
Till now we have not seen any significant chip degradation over time. Biggest problem is to get defect-less chip. And they seem to be overcoming it.
Very interesting times. It's really hard to comprehend how 20 years ago transistors were ~35x bigger.
I personally think I'll be avoiding sub-7nm products for a little while, until I hear more about reliability and data integrity. Engineers might be able to work around the limitations of physics, but you can't cheat or change physics.
They'll never put it into production unless it has certain level of reliability. As recall of millions of chips from very expensive devices may put foundry under.
Till now we have not seen any significant chip degradation over time. Biggest problem is to get defect-less chip. And they seem to be overcoming it.
schmidtbag
Senior Member
Posts: 5591
Joined: 2012-11-10
Senior Member
Posts: 5591
Joined: 2012-11-10
#5522121 Posted on: 02/22/2018 09:30 PM
EDIT:
Nevermind
EDIT:
Nevermind
Fox2232
Senior Member
Posts: 11371
Joined: 2012-07-20
Senior Member
Posts: 11371
Joined: 2012-07-20
#5522123 Posted on: 02/22/2018 09:33 PM
Yes, but if they go for mass production, they trust it. Maybe High clock OC may become issue. But on other hand, those devices will be 1st in lower clock, high efficiency phones, tablets
I understand that, but it's not like they have had years to test this. Normally I don't care when die shrinks happen - that's a pretty regular thing. The part that concerns me is how some have speculated 6-7nm is basically the smallest silicon-based electric transistors can get before stuff like quantum tunneling becomes a problem. So, I'm a little skeptical.
Yes, but if they go for mass production, they trust it. Maybe High clock OC may become issue. But on other hand, those devices will be 1st in lower clock, high efficiency phones, tablets
schmidtbag
Senior Member
Posts: 5591
Joined: 2012-11-10
Senior Member
Posts: 5591
Joined: 2012-11-10
#5522124 Posted on: 02/22/2018 09:34 PM
I just realized that these don't appear to be traditional silicon-based transistors, and were in development for years along side traditional transistors. So - I'm pretty sure I'm wrong about what I was thinking anyway.
Yes, but if they go for mass production, they trust it. Maybe High clock OC may become issue. But on other hand, those devices will be 1st in lower clock, high efficiency phones, tablets
I just realized that these don't appear to be traditional silicon-based transistors, and were in development for years along side traditional transistors. So - I'm pretty sure I'm wrong about what I was thinking anyway.
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Senior Member
Posts: 5591
Joined: 2012-11-10
Very interesting times. It's really hard to comprehend how 20 years ago transistors were ~35x bigger.
I personally think I'll be avoiding sub-7nm products for a little while, until I hear more about reliability and data integrity. Engineers might be able to work around the limitations of physics, but you can't cheat or change physics.