Fractal Design Pop Air RGB Black TG review
Palit GeForce GTX 1630 4GB Dual review
FSP Dagger Pro (850W PSU) review
Razer Leviathan V2 gaming soundbar review
Guru3D NVMe Thermal Test - the heatsink vs. performance
EnGenius ECW220S 2x2 Cloud Access Point review
Alphacool Eisbaer Aurora HPE 360 LCS cooler review
Noctua NH-D12L CPU Cooler Review
Silicon Power XPOWER XS70 1TB NVMe SSD Review
Hyte Y60 chassis review
Rumor: AMD Epyc2 processors could get 64 cores over 8+1 dies
That AMD has been going insanely strong with many-core processors is not a surprise, you've read all our Threadripper reviews and have learned that the top tier processors (e.g. 32-core versions) have four dies each holding 8 CPU cores. So what does the future bring? Well, how do 64 cores over eight dies sound?
The chatter at the moment is based on an 8+1 version block diagram spreading on the web, with 8 dies and 8-cores per die you are looking at 64 cores and 128 Threads. Obviously, that kind of design would apply towards AMD Epyc2 processors or even later revisions. The extra (middle) die is intended for a dedicated system controller chip.
The dies would all be connected over the infinity fabric with a dedicated system controller. This new rumor was derived from ComputerBase who noticed information from SemiAccurate plus sketches that an engineer has put on Twitter. In his own words, these sketches are his interpretation of how AMD would build the upcoming server processors. Backtracing the twitter account I noticed that the block diagrams have been posted by K.H. Chia, he is a retired engineer. So if this is just an example showcase present to AMD or not, we cannot verify. So how true or false these new design sketches are, remains to be seen but for now I rate this as some speculation at best. The architecture is listed as Rome.
If AMD shrinks the dies towards 7nm next year, effectively they have a die half the size of what it currently is. More dies would fit on the same surface. Placing a chip in the middle that is connected to all the CPU-dies could result in less latency than in the current design where the ccx's are interconnected via the Infinity Fabric.
AMD has officially not yet published any specific about the Epyc 2 server processors. The manufacturer has said that the processors are made on the 7nm process of TSMC and that they will become next year.
Rumor: AMD Might Host Threadripper 2000 event in Scuderia Ferrari’s hometown Maranello - 06/30/2018 07:36 PM
A new rumor has surfaced on the web today, AMD would be celebrating it's one-year HEDT Threadripper release, with an event planned for Threadripper 2. This launch event would take place in Maranello,...
Rumor: ASUS Would be Repositioning AMD Graphics cards under a new AREZ brand - 04/06/2018 05:07 PM
The uncomfortable GPP discussion does not seem to stop, some new info just surfaced. It's unconfirmed but from the looks of it, ASUS will be rebranding their Radeon lineup and moving them away from A...
Rumor: ASRock is going to make graphics cards - 03/07/2018 03:30 PM
According to Digitimes, ASRock has active plans to start fabbing graphics cards. ASRock would release AMD cards solely, and in April the first one should surface....
Rumor: AMD Radeon 490 and 490X Polaris graphics cards launch end of June - 04/07/2016 02:33 PM
In line with expectations today some new rumors surfaced on the mighty WWW. AMD possibly will have its first Polaris based series 400 Radeon graphics cards available in June, this would invoke the R9 ...
Rumor: AMD gets priority advantage to Hynix HBM2 - 07/15/2015 10:48 AM
This is an interesting story, apparently AMD secured the luxury of getting exclusive access to Hynix HBM2 graphics memory. The second iteration of High bandwith memory (stacked memory to be used on-d...
WareTernal
Senior Member
Posts: 256
Joined: 2013-09-27
Senior Member
Posts: 256
Joined: 2013-09-27
#5602115 Posted on: 10/31/2018 07:34 PM
So they are maybe going to ditch the '2 NUMA node' setup? Better late than never
So they are maybe going to ditch the '2 NUMA node' setup? Better late than never
azraei97
Junior Member
Posts: 6
Joined: 2018-10-31
Junior Member
Posts: 6
Joined: 2018-10-31
#5602117 Posted on: 10/31/2018 07:36 PM
very true at 12nm.
if they use a "hub" design for the controller a la "epyc 2" as shown, that would be a major difference.
also remaining to be seen is whether or not HBM2 is going to be used and/or if the related costs have come down. there very well may be a "HBM 3" made at a smaller node as well, which would lower the cost (after production costs are earned back).
For now AMD still can't do multi chip GPU working as work like in the CPU. AMD already talk about this. Navi also unlikely to get multichip design
https://www.pcgamesn.com/amd-navi-monolithic-gpu-design
very true at 12nm.
if they use a "hub" design for the controller a la "epyc 2" as shown, that would be a major difference.
also remaining to be seen is whether or not HBM2 is going to be used and/or if the related costs have come down. there very well may be a "HBM 3" made at a smaller node as well, which would lower the cost (after production costs are earned back).
For now AMD still can't do multi chip GPU working as work like in the CPU. AMD already talk about this. Navi also unlikely to get multichip design
https://www.pcgamesn.com/amd-navi-monolithic-gpu-design
chispy
Senior Member
Posts: 9275
Joined: 2006-10-29
Senior Member
Posts: 9275
Joined: 2006-10-29
#5602122 Posted on: 10/31/2018 07:52 PM
128 threads would be Epyc " Pun intended "
128 threads would be Epyc " Pun intended "
Aura89
Senior Member
Posts: 8305
Joined: 2008-07-31
Senior Member
Posts: 8305
Joined: 2008-07-31
#5602124 Posted on: 10/31/2018 07:57 PM
I kinda hope this is wrong. I was hoping that 7nm would bring a core count change to the CCXs, and have it capable of having 64 cores on 4 CCXs (AKA 16 cores per CCX)
Even 14, 12 or 10 cores per CCX would be nice.
I kinda hope this is wrong. I was hoping that 7nm would bring a core count change to the CCXs, and have it capable of having 64 cores on 4 CCXs (AKA 16 cores per CCX)
Even 14, 12 or 10 cores per CCX would be nice.
Click here to post a comment for this news story on the message forum.
Senior Member
Posts: 11809
Joined: 2012-07-20
Not that I wrote it for purpose of clock. What I wrote about is minimizing area of dies which host CPU cores and put as much of uncore to central "hub". That way you have all CCXes in sync much better. And There is saving of transistors too. And cost of 7nm would affect only minimum needed part of CPU. On top of that uncore is not power hungry, therefore 14/12nm is fine and it does not need 7nm. So no reason to pay for 7nm transistors which can be moved to central "hub".