Power management technology could boost SSD write speed to 4.2Gbps

A university research group and Toshiba Corp jointly developed a power supply technology that can enhance the write speed of SSDs (solid state drives) by 60% to 4.2 Gbps compared with existing SSDs.

The research group is led by Ken Takeuchi, associate professor at the Department of Electrical Engineering and Information Systems, Graduate School of Engineering of the University of Tokyo.

The new technology dynamically and optimally controls power supply in accordance with the number of NAND flash memories operating in parallel. It is target at the "3D SSD," which three-dimensionally stacks the components of, for example, a NAND flash memory.

The research group and Toshiba announced the details of the technology at 2010 Symposium on VLSI Circuits, which took place from June 16 to 18, 2010, in Honolulu, Hawaii (thesis number: 22.4).

This time, the research group and Toshiba aimed to solve this problem by using a power supply system equipped with a boost converter that was developed by Takeuchi, etc in February 2009 (See related article). The power supply system consists of a coil, high-voltage switch and boost converter control circuit. Among them, the boost converter control circuit was greatly improved.

In an SSD, multiple NAND flash memories are operating in parallel. And the number of chips operating in parallel (the number of channels) changes according to the state of data writing, etc. The former power supply system developed by Takeuchi, etc supplies a certain amount of electricity, regardless of the number of channels.

With this method, when the number of channels exceeds a certain level, it becomes impossible to supply electricity needed for writing data (about 20V) to each chip. Therefore, it limits the number of channels to 15 or less, capping the write speed of SSDs at 2.6Gbps. 

According to the results of actual measurements and simulations, the new method enables to increase the number of channels to up to 24, which is 1.6 times more than before, in the high-speed mode, the research group and Toshiba said. As a result, the write speed can be improved by up to 60% to 4.2Gbps. When the low-speed mode is applied, the electricity supply required to boost the voltage of a chip can be reduced by 32%, they said.  More here