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Guru3D.com » News » New Vulnerability hits Intel processors - Lazy FP State Restore

New Vulnerability hits Intel processors - Lazy FP State Restore

by Hilbert Hagedoorn on: 06/14/2018 11:34 AM | source: | 34 comment(s)
New Vulnerability hits Intel processors - Lazy FP State Restore

Yet another security vulnerability was found in Intel chips and affects the processor's speculative execution technology, much like Spectre and Meltdown. It can potentially be exploited to access sensitive information, including encryption related data.

The news was just posted at Intel, we'll follow the explanation from Red Hat though; Exploitation of lazy floating point restore could allow an attacker to obtain information about the activity of other applications, including encryption operations. The underlying vulnerability affects CPU speculative execution similar to other recent side-channel vulnerabilities. In this latest vulnerability, one process is able to read the floating point registers of other processes being lazily restored.

Root Cause - Lazy save/restore of FPU/SSE/AVX States:

Modern processors employ numerous techniques to improve system performance. One such technique is to defer save and restore of certain CPU context states on task switch. Today, processors come equipped with a dedicated Floating Point Unit (FPU) to perform high precision floating-point operations used in scientific, engineering and/or graphics applications. The FPU maintains its own context state in its data registers, status registers, as well as control and opcode registers.

A task/context switch occurs when a user application calls a kernel function or when a process is preempted to schedule the next one in the queue. Upon a task switch, the processor saves its current execution context (various registers, instruction and stack pointers, etc.) and loads the context of the new process. While doing so, it can defer restoring of FPU/SSE context state, because not all applications use the Floating Point Unit (FPU). If the newly scheduled process does not use Floating-Point (FP) instructions, it does not need to save/restore FPU context state. This can save precious execution cycles and improves performance.

Under the lazy restore scheme, during task switch, the first FP instruction executed by a process generates a “Device not Available (DNA)” exception; the DNA exception handler then saves the current FPU context into the old task’s state save area and loads the new FPU context for the current process. In other words, loading of the FPU state is deferred until an FP instruction is invoked by the current task - Lazy FPU restore.

Recent processors include processor extensions (“XSAVEOPT”) that implement FPU restore in hardware more efficiently, giving the performance benefits of lazy FPU without having to rely on the DNA exception. On these processors, Red Hat Enterprise Linux 7 is already using eager FPU restore, and is therefore not vulnerable.

Impact
A newly scheduled task can use the exploit described herein to infer the Floating Point register state of another task, which can be used to leak sensitive information.







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fantaskarsef
Senior Member



Posts: 12980
Joined: 2014-07-21

#5557248 Posted on: 06/14/2018 11:37 AM
Another week, another Intel exploit.

BigMaMaInHouse
Senior Member



Posts: 137
Joined: 2016-10-11

#5557252 Posted on: 06/14/2018 11:46 AM
It's funny for us , but just imagine the *** the big server farms are going thru week after week that every time they think the patching is over- here we start again...
EPYC becoming more and more attractive for them for next upgrade lol.

cryohellinc
Senior Member



Posts: 3486
Joined: 2014-10-20

#5557254 Posted on: 06/14/2018 11:50 AM
It's funny for us , but just imagine the *** the big server farms are going thru week after week that every time they think the patching is over- here we start again...
EPYC becoming more and more attractive for them for next upgrade lol.
Not a single platform is fully secure from issues such as those. With enough time, research and testing you can find loopholes practically everywhere.

Simply this is a new public trend to follow this information, hence all of those research agencies which attempt to find a loophole, cash in on it and get some easy publicity.

Labyrinth
Senior Member



Posts: 4389
Joined: 2008-07-15

#5557255 Posted on: 06/14/2018 11:59 AM


asturur
Senior Member



Posts: 1199
Joined: 2010-05-12

#5557256 Posted on: 06/14/2018 12:01 PM
Also is unclear if this problem affects AMD too.
If lazy fpu restore was good and not proprietary tech ( but a part of x86 and x64 patent ) amd has it too probably?

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