Marvell announces Bravera SC5 SSD Controller Family supports PCIe Gen 5.0 (17GB/s)

It's aimed at the data-center business, but the interesting part is that it is PCie Gen 5.0 compatible already. Marvell’s Bravera SC5 controller family, the industry’s first SSD controllers to support PCIe 5.0 and NVMe 1.4b.

With 2x performance compared to PCIe 4.0 SSD controllers, the Bravera SC5 SSD controllers enable up to 14 GB/s of throughput and 2 million random read IOPS. Optimized specifically for cloud environments, the Bravera SC5 controllers are the first to incorporate an Elastic SLA Enforcer to minimize cloud server CPU utilization and improve user experience. The controllers enable the world’s first 16CH E.1S, providing 2x performance over existing 8CH solutions. Additionally, the Bravera SC5 SSD controllers are the industry’s first flash controllers to enable multiple usage models such as SEF, ZNS, Open Channel, and more without hardware changes. This provides the flexibility to seamlessly repurpose the same underlying hardware when migrating to next-generation workloads.

The Marvell Bravera SC5 SSD controllers enable next-generation solid-state drives for cloud and data center flash storage applications. The products in the Bravera SSD familyMV-SS1331 and MV-SS1333 support 8 or 16 high performance NAND channels respectively. The Bravera SC5 SSD controllers are NVMe 1.4b compliant and feature end-to-end data protection with support for up to 4 PCIe lanes, or a dual port up to 2 PCIe lanes per port. The flash controller issues read, write, or erase commands to the NAND and has a hardware RAID engine. Its error correction engine, the Marvell 5th generation of NANDEdge™, uses low-density parity coding (LDPC) that is compatible with a variety of NAND types: SLC, MLC, TLC, and QLC from all NAND vendors.

The Bravera SC5 SSD controllers feature 72-bit DDR interface with the option of using either DDR4 or LPDDR4X and has 10 embedded processor cores: Arm® Cortex®-R8 cores plus additional Cortex-M7 cores for providing further flexibility. In addition, a Cortex-M3 processor core with integrated instruction/data SRAM and crypto engines (AES, SHA, RSA, ECC) in a secure boundary handles the security (TCG) standards for all secure drive control and key management. Featuring ultra low latency (< 6us) can enable SSD storage solutions that offer levers to control and meter performance at the drive level being able to offload hypervisors and free up host system resources. Available in 20x20mm package, these controllers can enable new EDSFF factors including 16CH E1.S solutions

• Marvell MV-SS1331 with 8 NAND channels
• Marvell MV-SS1333 with 16 NAND channels