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Guru3D.com » News » Leaked Intel Alder Lake slides indicate support for PCIe 5.0 and DDR5

Leaked Intel Alder Lake slides indicate support for PCIe 5.0 and DDR5

by Hilbert Hagedoorn on: 03/22/2021 09:11 AM | source: videocardz | 20 comment(s)
Leaked Intel Alder Lake slides indicate support for PCIe 5.0 and DDR5

Over the weekend a slide leaked on the Intel's pending Alder Lake, you know the BIG.little core design processors that will follow later this year, after Rocket Lake. The slide indicates the 10nm processors will receive support for DDR5 and PCIe 5.0

Intel itself has indicated a release late this year for this 10nm lga1700 socket processor series for notebooks and desktops. However leaked marketing slides published by VideoCardz include showing a thing or two more. Performance in single-threads could be  'up to twenty percent better. Note, It's not indicated what intel is actually comparing to, (Rocket Lake or Tiger Lake)

The slides also show that multithreaded performance would be 'up to twice' better as well as usage of Gracemont cores. Alder Lake CPUs would get two types of cores. In addition to faster Golden Cove cores with hyperthreading, the CPUs also get energy-efficient Gracemont cores without hyperthreading, which should improve multithreaded performance. The CPUs will utilize hardware-controlled scheduling to distribute tasks between the different cores.

 

 

Alder Lake will be get up to eight Golden Cove cores and up-to eight Gracemont cores, so that's in one with previous leaks we've seen, 16 cores and 24 threads. Interesting to notice is that Alder Lake CPUs have sixteen PCIe 5.0 and four PCIe 4.0 lanes. System memory-wise Alder Lake supports both DDR5 and DDR4 memory.

Intel confirmed the arrival of Alder Lake at CES in January but shared only a few details at the time. 

 



Leaked Intel Alder Lake slides indicate support for PCIe 5.0 and DDR5 Leaked Intel Alder Lake slides indicate support for PCIe 5.0 and DDR5 Leaked Intel Alder Lake slides indicate support for PCIe 5.0 and DDR5




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DmitryKo
Senior Member



Posts: 408
Joined: 2011-08-08

#5899140 Posted on: 03/25/2021 01:55 AM
PCIE 6.0 has almost final draft, and PHY/Receivers are in development.
That's too late for a product released by end of 2021. The final spec should have been released two years prior, and final silicon should have been taped out a year prior.

We really need a storage solution that addresses latency/random read/write before going beyond PCIe 4.0X4 matters much anyway. Clearly the interface does not help much on the random side.
NVMe still uses 512 Byte sectors and LBA adressing to match hard disk access patterns of current software. We would need 1) large sectors/clusters and contiguous alocation of free space, and 2) device drivers and software optimised for data access patterns of flash memory disks.

BTW Microsoft is planning to bring the DirectStorage API from Xbox Series X to Windows 10 - this will require an NVMe disk for muich improved load times. Details will be available at Game Stack Live event (April 20-21, 2021).

Optane has too many caveats unfortunately

Optane has no caveats when used in disk storage devices, but it's simply too expensive for a consumer PCs. Intel recently cancelled all end-user storage devices and concentrated on server-oriented 'Optane DC' DIMM memory.

Astyanax
Senior Member



Posts: 15331
Joined: 2018-03-21

#5899153 Posted on: 03/25/2021 03:44 AM
That's too late for a product released by end of 2021. The final spec should have been released two years prior, and final silicon should have been taped out a year prior.


Final draft is fine for releasing hardware with, Intel did it with Sandy bridge E

Alder lake isn't coming till 2023/2024, so just skip Gen 5.

DmitryKo
Senior Member



Posts: 408
Joined: 2011-08-08

#5899223 Posted on: 03/25/2021 11:13 AM
Final draft is fine for releasing hardware

PCIe 6.0 is not at the final draft stage yet - that would be version 0.9, and so far only draft 0.7 has been approved.

Alder lake isn't coming till 2023/2024

No, that's Meteor Lake, a 7 nm node refresh.

nosirrahx
Senior Member



Posts: 445
Joined: 2013-04-05

#5899269 Posted on: 03/25/2021 02:45 PM

NVMe still uses 512 Byte sectors and LBA adressing to match hard disk access patterns of current software. We would need 1) large sectors/clusters and contiguous alocation of free space, and 2) device drivers and software optimised for data access patterns of flash memory disks.


I'll have my hands on a P5800X later this years and I will make sure to do a side by side with it and something like a 980 Pro (or whatever NAND based storage is the king of 4K random at that time). It will be interesting to see just how far NVMe on its own can actually go. Combining something better than NVMe with something better than NAND would obviously be better but for now NVMe is what we have.

DmitryKo
Senior Member



Posts: 408
Joined: 2011-08-08

#5899390 Posted on: 03/25/2021 10:20 PM
I'll have my hands on a P5800X
It will be interesting to see just how far NVMe on its own can actually go.
Random access performance would still be limited by the embedded NVMe controller, which has to translate LBA sectors and align all operations to native read/write page size - and as long as disk operations are still based on 512 Byte sectors and 4KByte clusters, even Optane (3D Xpoint) memory wouldn't help random access throughput, in spite of being 3 to 4 orders of magnitude faster than flash memory.


FYI there are recent NVMe specification, NVMe Zoned Namespaces (ZNS) with ZNS Command set, a part of upcoming NVMe 2.0.
Zones are based on physical flash memory dies; they use sequential writes and append-only write policy with native flash memory write/erase block I/O sizea. This would move garbage collection and wear levelling to the OS, reducing write amplification and overprovisioning, and improve access latencies by eliminating the Flash Translation Layer (FTL).

https://nvmexpress.org/new-nvmetm-s...-namespaces-zns-as-go-to-industry-technology/
https://blog.westerndigital.com/nvme-spec-ratification-zns-ssd/
https://www.anandtech.com/show/15959/nvme-zoned-namespaces-explained/3
https://blog.westerndigital.com/what-is-zoned-storage-initiative/
https://zonedstorage.io/introduction/zns/

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