This high scalability is complemented by 256KB L2 dedicated cache memory for each core, a shared L3 cache of 24MB and even Turbo Boost technology, which can disable unused cores in order to safely and effectively boost the heavily used ones. The 8-core also has a memory controller with four DDR3 memory channels and is built on the 45nm HKMG process (it is based on the Nehalem architecture).
The 8-cores will make their official debut later this month. In addition, Intel is preparing to formally add its Westmere-EP processors around the same time. These will be based on the 32nm Westmere process and will likely have six cores (aimed at two-socket servers), a 12MB L3 cache and three DDR3 channels.