Intel Ivy Bridge CPU Die Estimated

Intel's Ivy Bridge series of CPUs has been the topic of many rumors and leaks recently, but its die layout has not been disclosed yet. That did not stop Hiroshige Goto, contributor for PC Watch, from estimating it and the configurations it would allow for, says softpedia:

According to him, the layout is the same as the one exhibited by the Sandy Bridge collection.

The central portion has four x86-64 cores, each with 256 KB of dedicated L2 cache memory. All are connected by 8 MB of shared L3 cache.

On the sides of the central portion lie the system agent and the graphics core, the HD 4000 which behaves up to 122.1% better in benchmarks compared to SB's HD 3000.

The system agent includes a PCI Express controller, the DMI chipset bus and the interface for dual-channel DDR3 memory. What binds all these separate entities together is a ring-bus, which transports data between the CPU cores, L3 cache and system agent.

All in all, the die area should be of roughly 166 square millimeters (160 mm