Intel confirms large LGA1700 socket for Alder Lake In Developer Document
Although not announced or done deliberately, some technical documentation popped up showing that Alder Lake, the processors following Rocket Lake, is indeed based on a Socket LGA 1700 de`sign, which means 1700 pins.
It was Momomo who found and posted a screenshot that refers to a technical document, which indeed mentions 'LGA1700-ADL-S'. The document is grabbed from the Intel's site for developer tools with a toolkit for developing VR software. As you'll notice, mentioned in the name is LGA1700 and ADL-S. ADL-S could bring support for ddr5 and PCIe 5.0, albeit that is very much so, speculation. According to rumors, it will be 45 × 37.5mm in size , being a rectangle instead of the square that we are currently used to. This won't be the only big change Alder Lake-S would bring: Rumor has it that it will have a BIG.little design similar to that used in smartphone processors, with eight high-performance cores and eight high-efficiency cores.
Alder Lake-S could arrive at the end of next year, as part of the 12th generation of Intel Core processors.
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@PrMinisterGR
Technically, I couldn't play any new games (Battlefield 1 with more than 20 people on a server, +30 would stutter and +40 was unplayable) on my i5 2500k because it would hit 100% usage and bottleneck my GPU hard: even a R9 270X. I know, not an HT i7 but that wouldn't solve the issue as HT isn't the same as a real core.
As soon as the new challenges with having so many cores are solved and they scale perfectly, you'll have games that use all threads in less than half a decade. New generation of consoles will pave the way for new and better games that will take advantage of these new CPUs.
It's not hard to make software to use the new resources, what is hard is to schedule the use of said resources.
Unreal engine is paving the way with some new tech that scales LOD automatically, those engines will make the life of game creators allot easier and automated. Eventually, the engine alone will allocate automatically all the resources and the creator, just creates the game!
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The thing is, there is one thread that needs to do the synchronization at the end, and there are math problems that can only be solved linearly.
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I was more talking about the real hard stop, 0.2nm. Intel already has issues with deviations of one atom, and that's at 14nm.
Listen to this video at 5:42
This is not correct. And then they do not talk about issues from single atom deviations, but about ability to measure single atom deviations.
And that they are doing their best to keep control on that level of dimensions... (atoms)
That does not mean one atom here or there will result in defect. And definitely not on 14nm.
I would argue that there is no going back from chiplets. They make things way too convenient to be abandoned. EPYC already can combine external accelerators using them, and so does Xeon.
If anything a 16 core CPU with dedicated audio, physics, ai, network and IO chiplets, would be a much better purchase than a 32-core one.
Video says it for you. When you can cram twice as many transistors into same area, you can integrate. Sure, today 16C/32T+all you wrote is doable in one chip and for more one is wise to use chiplets.
But double transistor density and suddenly you have different options.
And when we go to that real hard stop 0.2nm. I think that we'll be able to get 32C/64T CPU in area of one chip that will be economically viable. Maybe even on 3nm.