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GobalFoundries 12LP+ FinFET solution ready for production
There's yet another optimization enhancement at 12nm, GobalFoundries has announced that its most advanced FinFET solution, the 12LP+, has completed technology qualification and is ready for production.
The foundry's 12LP+ solution is optimised for artificial intelligence (AI) training and inference applications.
Built on a proven platform with a robust production ecosystem, the 12LP+ introduces new features including an updated standard cell library, an interposer for 2.5D packaging, and a low-power 0.5V Vmin SRAM bitcell that supports the low latency and power-efficient shuttling of data between the AI processors and memory. The result is a semiconductor solution that has been specifically engineered to meet the needs of the fast-growing AI market.
“Artificial intelligence is on a trajectory to become the most disruptive technology of our lifetime,” said Amir Faintuch, senior vice president and general manager of Computing and Wired Infrastructure at GF. “It is increasingly clear that the power efficiency of AI systems – in particular how many operations you can wrest from a watt of power – will be among the most critical factors a company considers when deciding to invest in data centres or edge AI applications. Our new 12LP+ solution tackles this challenge head-on. It has been engineered and optimised, obsessively so, with AI in mind.”
By partnering closely and learning from existing AI clients, GF has developed the 12LP+ to provide greater differentiation and increased value for designers in the AI space while minimising their development and production costs.
Driving the enhanced performance of 12LP+ are features including a 20-percent SoC-level logic performance boost over 12LP, and a 10-percent improvement in logic area scaling. These advancements are achieved in 12LP+ through its next-generation standard cell library with performance-driven area optimized components, single Fin cells, a new low-voltage SRAM bitcell, and improved analogue layout design rules.
12LP+ is also augmented by GF’s AI design reference package, as well as GF’s co-development, packaging, and post-fab turnkey services. Close collaboration between GF and its ecosystem partners has resulted in cost-effective development costs and a quicker time to market.
GF said that it will expand the IP validations for 12LP+ to include PCIe 3/4/5 and USB 2/3 to host processors, HBM2/2e, DDR/LPDDR4/4x and GDDR6 to external memory, and chip-to-chip interconnect for designers and clients pursuing chiplet architectures.
GFs’ 12LP+ solution has been qualified and is now ready for production at GF’s Fab 8 in Malta, New York. Several 12LP+ tape-outs are scheduled for the second half of 2020.
Silva
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Senior Member
Posts: 1992
Joined: 2013-06-04
#5805216 Posted on: 07/02/2020 01:11 PM
Although I dislike their strategy to drop R&D on 7nm, it's great to see them still improving existing technologies. If they have production capacity sold, it's not a bad strategy to invest on those instead of sinking billions on the uncertain.
Paving the way is really expensive, and TSMC is gambling hard investing billions to be upfront. Intel failed with 10nm and probably cost them millions in R&D and lost market share. If GF was failing with their 7nm approach, the decision they made was the right one.
That said, they'll eventually have to move on to smaller nodes. Either purchasing IP or developing their own, no one can stay behind for too long. Either that or they'll be making chips for calculators in a couple of years.
Although I dislike their strategy to drop R&D on 7nm, it's great to see them still improving existing technologies. If they have production capacity sold, it's not a bad strategy to invest on those instead of sinking billions on the uncertain.
Paving the way is really expensive, and TSMC is gambling hard investing billions to be upfront. Intel failed with 10nm and probably cost them millions in R&D and lost market share. If GF was failing with their 7nm approach, the decision they made was the right one.
That said, they'll eventually have to move on to smaller nodes. Either purchasing IP or developing their own, no one can stay behind for too long. Either that or they'll be making chips for calculators in a couple of years.
schmidtbag
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Joined: 2012-11-10
Senior Member
Posts: 7440
Joined: 2012-11-10
#5805241 Posted on: 07/02/2020 02:57 PM
Anyone else getting rather bored of how buzzwordy AI has become? Seems if you want to stand out at all as a technology company, you MUST use AI in your marketing somehow, regardless of relevancy.
Anyway, although I'm sure they've got plenty of customers at 12nm, I think they need to be a bit more aggressive in their developments. Even though AMD uses 12nm for their IO dies, those dies are pretty chunky, and could potentially be taking up space that they could use for more cores, a bigger iGPU, or perhaps built-in HBM2. From what I recall, AMD does use GF for these dies, but I don't know if they can stick with 12nm for long.
Anyone else getting rather bored of how buzzwordy AI has become? Seems if you want to stand out at all as a technology company, you MUST use AI in your marketing somehow, regardless of relevancy.
Anyway, although I'm sure they've got plenty of customers at 12nm, I think they need to be a bit more aggressive in their developments. Even though AMD uses 12nm for their IO dies, those dies are pretty chunky, and could potentially be taking up space that they could use for more cores, a bigger iGPU, or perhaps built-in HBM2. From what I recall, AMD does use GF for these dies, but I don't know if they can stick with 12nm for long.
Silva
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Posts: 1992
Joined: 2013-06-04
Senior Member
Posts: 1992
Joined: 2013-06-04
#5805257 Posted on: 07/02/2020 04:06 PM
@schmidtbag
AMD said IO doesn't scale well with node so making it cheaper would benefit both them and the consumer. They didn't need the extra space anyway for Zen 2, so going that route was the best of both engineering and economics.
That said, they had a big contract with GF for their production and could not afford cancel. As Ryzen needed to move forward in node (for competition sake) and GF wouldn't have a 7nm one, TSMC 7nm was chosen.
It's true that IO die is taking up enormous space (not relevant on sTRX4 but very much so on AM4), I predict that as soon as possible it will transit to 7nm: probably with Zen 4 on 5nm.
@schmidtbag
AMD said IO doesn't scale well with node so making it cheaper would benefit both them and the consumer. They didn't need the extra space anyway for Zen 2, so going that route was the best of both engineering and economics.
That said, they had a big contract with GF for their production and could not afford cancel. As Ryzen needed to move forward in node (for competition sake) and GF wouldn't have a 7nm one, TSMC 7nm was chosen.
It's true that IO die is taking up enormous space (not relevant on sTRX4 but very much so on AM4), I predict that as soon as possible it will transit to 7nm: probably with Zen 4 on 5nm.
Kaarme
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Joined: 2013-03-10
Senior Member
Posts: 3408
Joined: 2013-03-10
#5805263 Posted on: 07/02/2020 04:35 PM
@schmidtbag
AMD said IO doesn't scale well with node so making it cheaper would benefit both them and the consumer. They didn't need the extra space anyway for Zen 2, so going that route was the best of both engineering and economics.
That said, they had a big contract with GF for their production and could not afford cancel. As Ryzen needed to move forward in node (for competition sake) and GF wouldn't have a 7nm one, TSMC 7nm was chosen.
It's true that IO die is taking up enormous space (not relevant on sTRX4 but very much so on AM4), I predict that as soon as possible it will transit to 7nm: probably with Zen 4 on 5nm.
If the thing about the contract is true, I wonder what kind of rank amateur was the one negotiating the contract. You'd think there would have been a clause in the contract stipulating GF must remain competitive in the market for the contract to apply. So, when GF abandoned the 7nm race, a sensible contract would have been void. That being said, perhaps there is such a clause, but it had a very lax time limit.
@schmidtbag
AMD said IO doesn't scale well with node so making it cheaper would benefit both them and the consumer. They didn't need the extra space anyway for Zen 2, so going that route was the best of both engineering and economics.
That said, they had a big contract with GF for their production and could not afford cancel. As Ryzen needed to move forward in node (for competition sake) and GF wouldn't have a 7nm one, TSMC 7nm was chosen.
It's true that IO die is taking up enormous space (not relevant on sTRX4 but very much so on AM4), I predict that as soon as possible it will transit to 7nm: probably with Zen 4 on 5nm.
If the thing about the contract is true, I wonder what kind of rank amateur was the one negotiating the contract. You'd think there would have been a clause in the contract stipulating GF must remain competitive in the market for the contract to apply. So, when GF abandoned the 7nm race, a sensible contract would have been void. That being said, perhaps there is such a clause, but it had a very lax time limit.
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Yeah, that might be a good example. IC business is huge. Not nearly all applications need the absolute top of the line CPUs and GPUs. Electronic devices are everywhere, in the consumer and industrial markets. As long as it's something more complicated than a toaster, it's likely to have some integrated circuits (though some toasters might have them already). I suppose GF is targeting the mid-range customers, not those who want simple ICs costing a cent at max, not those like AMD or Nvidia or the higher performance smartphone market, but manufacturers who need somewhat complicated chips but not at the bleeding-edge prices. I suppose feature phones and entry level smartphones would be good examples as well.