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GeForce GTX 1180 PCB Leaked
A mysterious photo has surfaced, claiming to be the PCB for GeForce 1180 (or whatever it'll be called). It's an interesting photo as it reveals a thing or two including connectors, phases and memory.
The photos just leaked via videocardz through Baidu through a user there and shows the PCB front and backside. if you count along with me, the photos have eight placements for 8GB or 16GB of memory (we assume GDDR6). Then you can count 10 power phases and you can spot a 6+8pin power connector. The NVIDIA logo on there is indicative for a reference design PCB.
If you look at the top, you can spot a new connector, that likely is something NVLink, and if it is it'll end the era of SLI as with NVLink two cards behave as one. The GPU size mounting area is rather small, so whilst we mention this to be the top dawg, it might as well be GV104 much to what NVIDIA did with the 1080 (GP104) opposed to the 1080 Ti (GP102). The board number is tagged at PG180, and does look final.
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NVIDIA Very Likely To Reveal GeForce GTX 1180 on August 20 - 07/31/2018 08:44 AM
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Denial
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#5570382 Posted on: 08/02/2018 02:20 PM
That GPU size looks really small.. like ~350mm2 small.. I don't really know what to make of that.
That GPU size looks really small.. like ~350mm2 small.. I don't really know what to make of that.
RavenMaster
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#5570384 Posted on: 08/02/2018 02:22 PM
So it has 6 pin + 8 pin power connectors and SLI capability
So it has 6 pin + 8 pin power connectors and SLI capability
Fox2232
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#5570386 Posted on: 08/02/2018 02:28 PM
But you have 8 times GDDR?6?! One can only wonder, 6+8 pin. And power delivery seems rather solid. Even on "12nm" that can mean 200/100MHz boost on min/max, maybe more on min if power draw is to be bit higher.
That GPU size looks really small.. like ~350mm2 small.. I don't really know what to make of that.
But you have 8 times GDDR?6?! One can only wonder, 6+8 pin. And power delivery seems rather solid. Even on "12nm" that can mean 200/100MHz boost on min/max, maybe more on min if power draw is to be bit higher.
nizzen
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#5570390 Posted on: 08/02/2018 02:29 PM
Nvlink is connecting 2 cards as one. 8+8 GB memory is 16GB, and 5000+5000 cudacores is 10 000 cudacores
Nvlink is connecting 2 cards as one. 8+8 GB memory is 16GB, and 5000+5000 cudacores is 10 000 cudacores
asturur
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#5570392 Posted on: 08/02/2018 02:46 PM
That is always true.
cuda cores are always doubled, i have difficulties to believe that for how much smart that connector can be, one gpu can retrieve a texture from the other card and allowing effective full memory usage of 2 cards.... Especially if is also used to move the framebuffer from one card to the other.
I'm sceptical but cannot wait for some news/ article.
Nvlink is connecting 2 cards as one. 8+8 GB memory is 16GB, and 5000+5000 cudacores is 10 000 cudacores
That is always true.
cuda cores are always doubled, i have difficulties to believe that for how much smart that connector can be, one gpu can retrieve a texture from the other card and allowing effective full memory usage of 2 cards.... Especially if is also used to move the framebuffer from one card to the other.
I'm sceptical but cannot wait for some news/ article.
fl2015
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#5570393 Posted on: 08/02/2018 02:49 PM
The Nvlink connector is reversed to the Titan V as in the bridge would probably have to be upside down, either the 11 series will have an entirely different Nvlink bridge or this is an early development board. It might make sense having a different Nvlink standard for gaming GPU's due to the fact the current bridge on the market costs more than a 1080.
The Nvlink connector is reversed to the Titan V as in the bridge would probably have to be upside down, either the 11 series will have an entirely different Nvlink bridge or this is an early development board. It might make sense having a different Nvlink standard for gaming GPU's due to the fact the current bridge on the market costs more than a 1080.
Fox2232
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#5570394 Posted on: 08/02/2018 02:50 PM
That is always true.
cuda cores are always doubled, i have difficulties to believe that for how much smart that connector can be, one gpu can retrieve a texture from the other card and allowing effective full memory usage of 2 cards.... Especially if is also used to move the framebuffer from one card to the other.
I'm sceptical but cannot wait for some news/ article.
Take nVLink bandwidth. Imagine 1/2 of data read at 360GB/s and then 1/2 at 50GB/s from other card. Count time to read it if Each card has 6GB cloned (360GB/s) and 1 GB shared (50GB/s).
In server compute, this is not an issue. Especially since there are multiple channels and bandwidth can go up.
That is always true.
cuda cores are always doubled, i have difficulties to believe that for how much smart that connector can be, one gpu can retrieve a texture from the other card and allowing effective full memory usage of 2 cards.... Especially if is also used to move the framebuffer from one card to the other.
I'm sceptical but cannot wait for some news/ article.
Take nVLink bandwidth. Imagine 1/2 of data read at 360GB/s and then 1/2 at 50GB/s from other card. Count time to read it if Each card has 6GB cloned (360GB/s) and 1 GB shared (50GB/s).
In server compute, this is not an issue. Especially since there are multiple channels and bandwidth can go up.
fantaskarsef
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#5570398 Posted on: 08/02/2018 03:11 PM
Really interesting indeed. I'm not sure this means it's not the PCB for the 1180 itself due to the chip size, or Nvidia did the unbelievable and did a node shrink nobody knew about... which I can't really imagine.
So if that is an NVlink connector... does that mean we get pooled resources, and that it easens mGPU adoption for developers, because they don't have to adress two cards but only the "GPU pool"?
That GPU size looks really small.. like ~350mm2 small.. I don't really know what to make of that.
Really interesting indeed. I'm not sure this means it's not the PCB for the 1180 itself due to the chip size, or Nvidia did the unbelievable and did a node shrink nobody knew about... which I can't really imagine.
So if that is an NVlink connector... does that mean we get pooled resources, and that it easens mGPU adoption for developers, because they don't have to adress two cards but only the "GPU pool"?
DDRSAM
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#5570403 Posted on: 08/02/2018 03:21 PM
Oooh it's starting to get tasty
Oooh it's starting to get tasty
Solfaur
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#5570406 Posted on: 08/02/2018 03:27 PM
If this is 16GB, I'm really curious what the 1180Ti will have...
If this is 16GB, I'm really curious what the 1180Ti will have...
Crazy Joe
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#5570408 Posted on: 08/02/2018 03:54 PM
Looking at the image and measuring the size of the PCI-E connector vs the size of the solder pad area and using this information to scale the pad area to its approximate size I get a rough chip package size of at least 4.75 centimeters square. I haven't been able to find a bare PCB shot of a GTX 1080 board, but I did find an image from Chiphell where they measured the chip package of a GP104 chip which came to around 3.75 cm square. This means that the chip itself is has an area that is at least 60% larger. What this means for the die itself is unclear, but since the process has shrunk to 12nm vs 16 nm for Pascal, we have to assume that a bigger die together with a smaller process would mean a lot more transistors!
That GPU size looks really small.. like ~350mm2 small.. I don't really know what to make of that.
Looking at the image and measuring the size of the PCI-E connector vs the size of the solder pad area and using this information to scale the pad area to its approximate size I get a rough chip package size of at least 4.75 centimeters square. I haven't been able to find a bare PCB shot of a GTX 1080 board, but I did find an image from Chiphell where they measured the chip package of a GP104 chip which came to around 3.75 cm square. This means that the chip itself is has an area that is at least 60% larger. What this means for the die itself is unclear, but since the process has shrunk to 12nm vs 16 nm for Pascal, we have to assume that a bigger die together with a smaller process would mean a lot more transistors!
HardwareCaps
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#5570410 Posted on: 08/02/2018 03:57 PM
Let's hope for a decent jump in performance, they had plenty of time for refinements
Let's hope for a decent jump in performance, they had plenty of time for refinements
Stormyandcold
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#5570412 Posted on: 08/02/2018 04:00 PM
It's all about how much better than Pascal this is. If this really is 12nm, then, that almost guarantees a refresh next year on 7nm as well.
It's all about how much better than Pascal this is. If this really is 12nm, then, that almost guarantees a refresh next year on 7nm as well.
HardwareCaps
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#5570413 Posted on: 08/02/2018 04:02 PM
a 7nm product wouldn't be a refresh. its a new node. 12nm is just marketing name for the refined 16nm that Pascal is using.
It's all about how much better than Pascal this is. If this really is 12nm, then, that almost guarantees a refresh next year on 7nm as well.
a 7nm product wouldn't be a refresh. its a new node. 12nm is just marketing name for the refined 16nm that Pascal is using.
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