AMD Rome Epyc 2 processor 64-Core (128 threads) spotted and benched in Sandra (2.2 GHz)
AMD is paving the 7nm road and the ZEN2 architecture hard and fast. In SiSoft Sandra now an entry can be spotted, this is an early engineering sample AMD Rome Epyc 2 processor running 64 cores and 128-threads (single CPU) at 2.2 GHz.
The chip tested is the AMD ZS1406E2VJUG5_22 / 14_N iwhich was planed into a Dell PowerEdge R7515 server. The proc is a qualification sample and perform close to the final performance aside from maybe the Turbo frequencies. Right now it is setup as 1.4 GHz Base with a boost to 2.2 GHz on all 64 cores. You can spot 64 x 512 KB L2 cache and 256 MB L3 cache. The second generation of Epyc chips is codenamed Rome and has a maximum of 64 cores and 128 threads by combining eight 8-core 7nm chips . ZEN2 will bring a higher ipc, smaller fabrication process and lower consumption.
These processors are of course data-center products, but you know it, this architecture will end up in desktop processors. So far all it pretty interesting. AMD expects a 25% generational performance increase for the CPU cores. While that's not IPC, the theory is that one die package would be 25% faster.
ZEN2 is not just a die-shink, it's a new architecture and based on chipsets. 7nm dies surrounding one 14nm IO chip in the center connected through AMD's Infinity fabric. The "Zen 2" high-performance x86 CPU processor core thus has a modular design methodology. An improved AMD Infinity Fabric interconnect links the separated pieces of silicon ("chiplets") within a single processor package. This should solve some latency issues. The new processor also will support 8-channel DDR4 memory. Also, PCI-Express will be supported. Rome looks amazing, the dies are just so small.
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The clocks on these are pretty low, even for such a large core count.
That I/O die has got to consume a good bit of power, and i'm wondering if it can be clock gated as well as if it was within the CPU.
All those memory controllers, and infinity fabric can't just be switched off and on when needed i suspect, neither can the PCIe lanes.
It may not have to clock very high, but if the system controller base clock is tied to the memory clock still, it will be running quite fast.
This is apparently an engineering sample...as such the clocks will likely be higher in the shipping cpus. But it's the software that makes the difference, as 64/128 cores can clock much slower than 32/64, for instance, and with software that uses the cores the slower-clocked cpu will smoke the significantly higher-clocked cpu with half the number of cores, etc., while using less power, too. The ballgame changes dramatically in this cpu arena. It's bygone days for single-threaded cpus...

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This CPU is a big hit from AMD, its likely that datacenters will benefits from this type of cpus a lot, its not for us, but imo its a very good stand by amd into attaching intel in the business side.
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It is not that long ago when we used intel's P4 and AMD's Athlon XP Single core CPUs. This is like having 250~300 of such CPUs in single package.
Now imagine having that computational power back in the day in some cutting edge CPU rendering application. All that time we spent waiting for image rendering, encoding, ...
I just love how things move forward.
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Joke for 1st apr?
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Kinda gets me to wonder: what if you could run Crysis at 1080p on a dual-socket system with a pair of these CPUs... through a software renderer? Obviously you'd have to run the graphics at lowest settings, but that would be pretty interesting if it became playable.