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Guru3D.com » News » AMD Releases More Architecture Details on ZEN

AMD Releases More Architecture Details on ZEN

by Hilbert Hagedoorn on: 08/24/2016 06:35 AM | source: | 40 comment(s)
AMD Releases More Architecture Details on ZEN

As we get closer and closer to release, AMD today once again shared more info about Zen. Yesterday AMD talked to media about a ZEN microarchitecture deep-dive presentation from Hot Chips, and shared a lot of slides alright. 

A warning first, this is a bit of a deep-dive in technology.

The main identifier will be a 40% performance per core gain compared to Excavator. As you guys know the The new “Zen” architecture is designed to scale across all of AMD’s CPU business, from enthusiast desktop platforms to enterprise-class servers and notebooks, to embedded and semi-custom products. The initial “Zen” CPU core is stated to deliver more than 40 percent improvement in instructions per clock cycle over the previous generation cores and will come to market first in an 8-core, 16-thread system-on-chip for desktops (=Summit Ridge). For the new architecture AMD focused on three key areas when designing this special architecture:

  • Performance of the engine itself with completely new branch prediction, introduction of a micro-op cache and a much wider instruction window;
  • Throughput, to keep that high-performance engine fed with data and instructions out of memory through pre-fetching and a completely new cache memory hierarchy with 8 MB of L3 cache; and finally,
  • Efficiency having performance and throughput without increasing power, by leveraging a 14nm FinFET process and a wealth of power saving design techniques in the architecture.
If you look closely at the block diagram of the ZEN core then you'll notice something completely different from Bulldozer which was basically a mixed and merged design cores wise. ZEN in essence is a more traditional processor design however far more complex and advanced. 

Next to cores next-gen ZEN architecture holds CPU-Complex (CCX) which are four cores sharing an 8 MB L3 cache. Very similar to Intel processors where the cores share nothing beyond L3 cache, making them independent. ZEN, according to AMD should offer a better core overall in both efficiency and performance.

For us performance consumers Summit Ridge is likely going to be the processor that appeals the most with it's 8 cores and 16 threads. Bristol ridge will become the 4 core 8 threads processor series. Expectations are high and Summit Ridge may prove to be a make or break product for AMD. The Zen architecture will be built on a more efficient 14 nanometer FinFET process at GloFo, rather than the 32 nm and 28 nm processes of previous AMD FX CPUs and AMD APUs, respectively. Four variants of ES Zen are actually already spotted in the industry:

  • AM4 8 cores with 95W TDP (Summit Ridge)
  • AM4 4 cores with 65W TDP (Bristol Ridge)
  • SP3 24 cores with 150W TDP
  • SP3 32 cores with 180W TDP (Naples)

The "Summit Ridge" Zen family will feature a unified AM4 socket with its GPU-equipped "Bristol Ridge" APU counterparts, and feature DDR4 support and a an expected 95W TDP.  Newer roadmaps don't confirm the TDP for desktop products, they suggest a range for low-power mobile products with up to two Zen cores from 5 to 15W and 15 to 35W for performance-oriented mobile products with up to four Zen cores.

Each Zen core will have four integer units used for calculations (ALU). Two load/store units and two floating point units, and the decoder can decode four instructions per clock cycle.
  

 
Cache wise things have improved. The data prefetchers are much improved, these predict what data is needed short term by instructions and fetches that from the relatively slow RAM memory.  As usual you'll have your typical L1, L2 and L3 caches. I like to use the L for latency, the lower the number the less latency and that is faster bandwidth to work in. L1 now however is write-back. L1 data cache size is 32 KiB and separated from that there is a 64 KiB Instruction cache. The L1 cache is  write-back (and not write-through). L3 cache will be shared between full-fledged cores, and each core having a dedicated 512 kB L2 cache and in total 8 MB of L3 cache shared between four cores in a CCX (CPU Complex). Within a CCX there is L3 cache that has 16 parallel communication paths, with in total thus that 8MB cache (2MB per core). Each core can address that L3 cache pool at the same speed/ latency. The 80-core Summit Ridge processors thus would get two CXX units. This is twice as much as Intel processors offer. The combination of these improved caches should give AMD 5x more bandwidth compared to last-gen products. 

ZEN will also offer SMT multi-threading (hyper threading), each core is addressed to as two threads, with each thread competing for the resources on the core. Thus an 8-core processors is seen as 16-core processor by Windows. The processors are fabbed at 14nm FiNFET and AMD focused on power-draw from the start of the ZEN project from the start. ZEN processors have aggressive clock-gating. 14nm should bring a lot of additional power savings to ZEN, obviously ZEN is intended for mobile platforms as well. 

Instruction sets will be plentyful as well. ZEN will support all SSE and 128-bit AVX but to name a few: AVX, AVX2, BMI1, BMI2, AES, RDRAND, sMEP, SHA1/SHA256, ADX, CFLUSHopt, XSAVEC/XSAVES/XRSTORS, and SMAP. There also will be new AMD-exclusive instruction sets, including CLzero, and PTE Coalescing.

As stated, AMD ZEN is 40% faster per core compared to Excavator, but AMD doesn't leave it at that.In the further future there will be ZEN+, even more advanced designs and offering even faster performance. Obviously we cannot wait until the first ZEN Procesors will be released, that would be Summit Ridge which is an 8-core processor with 16 threads.

Have a peek at the slides I captured during the presentation.



AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN AMD Releases More Architecture Details on ZEN




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Aura89
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#5325935 Posted on: 08/24/2016 11:15 PM
Still missing the most important piece of information we don't yet know officially: The default clocks.


the "default clocks" don't mean anything, so how is that the most important piece of information?

tsunami231
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#5325938 Posted on: 08/24/2016 11:29 PM
i wonder how much STP they gona sacrifice for those 24c chips but like i been saying the DAY software actual use multi core/thread correctly and scale correctly AMD will be laughing to the bank, Atlest till Intel actual tries to make better chip

schmidtbag
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#5325943 Posted on: 08/24/2016 11:38 PM
i wonder how much STP they gona sacrifice for those 24c chips but like i been saying the DAY software actual use multi core/thread correctly and scale correctly AMD will be laughing to the bank, Atlest till Intel actual tries to make better chip


Why would the 24 core chips perform worse for STP than the 4 or 8 cores? Anyway even if that is the case, I don't suspect that really matters. Once you go beyond 8 cores, single-threaded tasks are no longer a priority or concern.

sykozis
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#5325947 Posted on: 08/24/2016 11:45 PM
the "default clocks" don't mean anything, so how is that the most important piece of information?


Default clocks are only meaningless if you're planning to buy the product regardless of it's performance. Being that this could easily be a "make or break" product for AMD, it has to clock high enough to be competitive. At the clock rate indicated by the supposed leaks, it's not going to perform well enough to compete with Intel.

tsunami231
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#5325951 Posted on: 08/24/2016 11:57 PM
clocks dont really matter its the STP that does. Majority of programs arnt multi core thread aware of 4 so 4 core, 6 core 8, core 24core, it dont mater how they performace if programs cant use the cores in meaningfull way, More core are nice but not at the sacrifice of STP which what is king still these days

Untill "ALL" programs become multicore aware STP will be remain king. which is gona be while even with the claims of DX12 and dev are lazy about that.

icedman
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Posts: 916
Joined: 2013-02-22

#5325954 Posted on: 08/24/2016 11:59 PM
I want to see some APUS with a higher tdp cap for overclocking 4c 8t with rx460 equivalent that would almost be enuff to replace my current rig lol

sykozis
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Posts: 21098
Joined: 2008-07-14

#5325955 Posted on: 08/25/2016 12:01 AM
clocks dont really matter its the STP that does. Majority of programs arnt multi core thread aware of 4 so 4 core, 6 core 8, core 24core, it dont mater how they performace if programs cant use the cores in meaningfull way, More core are nice but not at the sacrifice of STP which what is king still these days

Untill "ALL" programs become multicore aware STP will be remain king. which is gona be while even with the claims of DX12 and dev are lazy about that.

Single thread performance is directly affected by clock frequency....as is the performance in general. It doesn't matter if the processor can do 9IPC or 9000IPC, if the clock frequency is too low for the processor's performance to be competitive.

tsunami231
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#5325957 Posted on: 08/25/2016 12:04 AM
.... like I said I wana know how much STP the gona sacrificed for all those cores. which directly related to clock speeds and architecture it not just about clockspeeds.

-Tj-
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#5325975 Posted on: 08/25/2016 01:11 AM
You can't say that the base is 3ghz, the only thing we know is that based on a on a highly unreliable source that the engineering sample is 3ghz which says nothing about the final product except that its a minimum of 3ghz if the rumor is valid.
Personally, I think that the bench was a probably a fake.

that leaked ES sample was at base 2.8Ghz and turbo 3.2Ghz


Imo 8core base 3 or 3.2Ghz seems very plausible, Intel 6900K 8core has base 3.2Ghz

PrMinisterGR
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#5326041 Posted on: 08/25/2016 06:00 AM
.... like I said I wana know how much STP the gona sacrificed for all those cores. which directly related to clock speeds and architecture it not just about clockspeeds.


None. There is no useless integrated GPU in the high-end desktop parts, unlike the 4-core i7s, whose largest part of the die is the GPU.



This part is equivalent to the socket 2011 parts from Intel, and the AM4 socket will have a similar amount of pins, if I understood correctly.

By the way, the AMD presentation was very low key and professional, I liked very much how measured everyone was. After reading the Anandtech architecture analysis, this is shaping up to be a great part. We'll get more in the coming months.

Kaarme
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#5326054 Posted on: 08/25/2016 06:49 AM
the "default clocks" don't mean anything, so how is that the most important piece of information?


I said the most important piece of info we are still missing. Don't be like a political journalist by only looking at a single part of a sentence, cutting it out of context.

Of course price is also important, but it's not a technological specification.

PrMinisterGR
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#5326059 Posted on: 08/25/2016 07:00 AM
Judging by the presentations, I expect 3.0GHz to be the absolute minimum.

Minotaur
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#5326079 Posted on: 08/25/2016 07:49 AM
A iGPU isn't useless, my 4770k's keeps up with my 780Ti with SETI work units. It's also nice having a backup to the nvidia card that gets a black screen and requires a restart now and then due to driver bugs.
AMD better deliver, Intel needs competition. Perhaps they shall win against Intel? They failed with nVidia miserably and nVidia gimped their card designs as there was no real competition expected. Just look at those small memory buses, they are obviously holding back there till the next series. :(
I wish there was competition, just look at what's being held back!

LimitbreakOr
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#5326195 Posted on: 08/25/2016 01:02 PM
that leaked ES sample was at base 2.8Ghz and turbo 3.2Ghz


Imo 8core base 3 or 3.2Ghz seems very plausible, Intel 6900K 8core has base 3.2Ghz

yeah, near 3ghz is very plausible indeed and would have a lot of overclocking headroom just like intels 8 core too.

LimitbreakOr
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Posts: 374
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#5326200 Posted on: 08/25/2016 01:10 PM
A iGPU isn't useless, my 4770k's keeps up with my 780Ti with SETI work units. It's also nice having a backup to the nvidia card that gets a black screen and requires a restart now and then due to driver bugs.
AMD better deliver, Intel needs competition. Perhaps they shall win against Intel? They failed with nVidia miserably and nVidia gimped their card designs as there was no real competition expected. Just look at those small memory buses, they are obviously holding back there till the next series. :(
I wish there was competition, just look at what's being held back!

are you kidding? amd has not failed against nvidia at all, in fact they are doing incredibly well against them. Nvidia basically has more money to spare and they're ready to even sell at no profit if it means that they can keep the performance crown. AMD is the only reason nvidia consistently releases giant chips like we had in every titan or 780/980ti.

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