AMD James Prior Sheds Light on Threadripper Dummy Dies

#5473274 Posted on: 09/19/2017 09:29 AM

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just because there is no connections, does not mean it wasnt EPYC with laser cut to disable, not the first time any cpu/gpu have done exactly this LOL.....he is basically just saying "cannot enable the 2 dies because they have been disabled/cut" shame they couldnt optimize a hair further to pick the best of the dies of the 4 available for lowest leakage/highest speed possible and use that extra space for embedded vapor chamber or something along those lines as they are anything but low cost parts, seems a bunch of wasted space for a wonking huge cpu to me ^.^

#5473278 Posted on: 09/19/2017 10:00 AM

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@Dragonstongue.
ZERO difference.
If "your" dead, it doesn't matter if it was of old age/accident or anything else, as end result is still the same...

"you" only disable cores etc if market demand is high AND you have good yields.
dont see this with zen, as they started releasing the lower core (amount) cpus first,
as to gain stock on hand for TR or maybe even 1xC on X370

#5473304 Posted on: 09/19/2017 01:16 PM

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So the threadripper-dummy is dead?

RIP

#5473310 Posted on: 09/19/2017 01:38 PM

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Finally, I will sleep better knowing the truth.

#5473311 Posted on: 09/19/2017 01:40 PM

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Just as I had thought. AMD called them dummy dies to make it clear that there was no way to activate them.

#5473323 Posted on: 09/19/2017 02:30 PM

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I think I just shed a tear...all those cores will never have a future...sad

#5473346 Posted on: 09/19/2017 03:58 PM

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Just as I said before: they're functionally dummies or blanks. I really don't understand why everyone got their panties caught up in a knot about something so petty. James didn't need to come out and state something so obvious. It really makes no difference if they use defective dies or legitimately transistor-less dies.

But hypothetically, let's say these dies were in fact wired in a way where you could in theory unlock them and use them. Do people really have no clue how improbable that is? To my knowledge, you can't stick an Epyc in a TR motherboard, so even if it had core unlocking, the additional cores couldn't be used anyway. Remember, the BIOS needs to be able to know how to use whatever CPU you put in it. I'm not sure Epyc boards support TR either, but for argument's sake let's say they can. We all know Epyc is for servers and heavy-duty workstations, where motherboard manufacturers (regardless of permission) would never offer core unlocking; you're lucky to find such a board that offers overclocking. But assuming one did, these boards are even more expensive than the already pricey TR boards. You really want to pay hundreds of dollars extra for such a gamble? Meanwhile, even if none of the above situations were a problem, keep in mind that AMD's CCX system appears to need symmetrical functioning cores. Remember - these dies were used as dummies because they were deemed too dysfunctional for use. What this means is if you bought the 16-core TR, you would be required to have all disabled cores fully operational. Depending how many (or maybe which) cores are dysfunctional, you might actually end up losing cores that were enabled out-of-the-box. And then you have to deal with whatever complicated mess is involved with the memory controllers and PCIe lanes, since each CCX appears to supply their own.


It boggles my mind why anyone has the slightest glimpse of hope that they could ever unlock these two dies, or feels that they're being wasted.

#5473351 Posted on: 09/19/2017 04:05 PM

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So what's the point of having those two there, then? Heat dispersion?

#5473352 Posted on: 09/19/2017 04:08 PM

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Physical balance, so when installing the heatsinks you don't bend the integrated heatsink and break anything. Something needs to go there to protect the functioning dies, AMD has defective dies they can't use, and those dies just happen to be the exact right depth.

#5473355 Posted on: 09/19/2017 04:14 PM

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So the threadripper-dummy is dead?

RIP

Honestly, this is the best post in this thread so far.

#5473358 Posted on: 09/19/2017 04:17 PM

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Oh that makes total sense, I haven't thought of that.

#5473366 Posted on: 09/19/2017 04:28 PM

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Considering how many SKUs of thread ripper there are at 16cores or less, the smartest and cheapest long run solution would to be to rearrange the two dies to a top/bottom layout.

What happens when they get yields to very high rates to which they have limited amount of dead dies?

Are they going to go out of stock on threadripper?
Doesn't make any sense the route they went.

#5473372 Posted on: 09/19/2017 04:48 PM

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I'm assuming what you actually meant was "remove the 2 dummy dies and position the 2 functioning dies in the center of the package, side-by-side". In one perspective, what you said may be true. But there are some things to consider. For example, the dummy dies are literally waste products, so I don't think their current layout is a whole lot more expensive than you may think. Meanwhile, their current layout is pretty good at dissipating heat. The two cores are pretty much as far away from each other as they can get, so heat won't be concentrated in one small spot. Also, the sheer size of the package may limit where each die can be positioned. Keep in mind TR and Epyc mostly share the same socket, so "downscaling" the Epyc design may be cheaper than re-arranging the layout.


Then they'll use actual blanks with legitimately no transistors. Or, they could just wedge a piece of steel in there for even better thermal dissipation at a negligible price. This isn't that complicated.


TR isn't that high-demand of a product. Most people aren't willing to spend $550+ on a single CPU.
The only part of AMD's route that doesn't make sense is how the CCXs seem to need symmetry. They used this multi-die system to help reduce costs, but the design of the CCX must contribute a lot of waste.

#5473378 Posted on: 09/19/2017 05:04 PM

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Considering how many SKUs of thread ripper there are at 16cores or less, the smartest and cheapest long run solution would to be to rearrange the two dies to a top/bottom layout.

What happens when they get yields to very high rates to which they have limited amount of dead dies?

Are they going to go out of stock on threadripper?
Doesn't make any sense the route they went.
On the contrary, I think it's the most cost-effective solution. Threadripper is a derivative of EPYC and likely uses the same production line. To do what you're suggesting would mean creating a separate line specifically for TR, which would take both time and money.

#5473418 Posted on: 09/19/2017 06:51 PM

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"Won't be able to activate" doesn't mean "TR4 socket can't run on all-4-die-activated chips".
It might only runs with 4 channels of memory, and the other 2 non-channeled dies have to rely on the 2 channeled memory controller for data feed; therefore, more latencies, but it doesn't matter much for heavily threaded tasks and this what high-core CPUs are meant for.
We won't see full 32-core CPUs for "The Rippers", yes "The Rippers", any time in the next 10 years, no way; but 6-core x4 = 24 and 8-core x3 = 24 are possible if Intel manages to release its 18-cores with all-core boost clock goes beyond 3.0GHz. An 18-core monolithic CPU could be as big as a Vega chip, no joke. It is gonna be hard to harvest good chips that clock well.