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Memory (DDR4/DDR5) and Storage (SSD/NVMe) 367 Page 2 of 9 Published by

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Memory timings – a bit of theory/info about the used memories

Memory timings – a bit of theory/info about the used memories

The overall consensus with memory DIMMs (aside from frequency) is simple – the lower the number, the better the performance. When you look at the specs of a memory kit, for example, the one in this article, you will see something like CL19-21-21-42 1.35V (2T). What does it mean? Well, this refers to CAS-TRCD-TRP-TRAS and CMD. These values are measured in clock cycles. 


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CAS latency (CL) – the number of cycles between sending a column address to the memory and the beginning of the data in response. This is the number of cycles it takes to read the first bit of memory from a DRAM with the correct row already open. Unlike the other numbers, this is not a maximum, but an exact number that must agree between the memory controller and the memory.

  • Row Address to Column Address Delay (TRCD) – it’s the minimum number of clock cycles required between opening a row of memory and accessing columns within it. The time to read the first bit of memory from a DRAM without an active row is TRCD + CL.
  • Row Precharge Time (TRP) - the minimum number of clock cycles required between issuing the precharge command and opening the next row. The time to read the first bit of memory from a DRAM with the wrong row open is TRP + TRCD + CL.
  • Row Active Time (TRAS) - the minimum number of clock cycles required between a row active command and issuing the precharge command. This is the time needed to internally refresh the row, and overlaps with TRCD. In SDRAM modules, it is simply TRCD + CL. Otherwise, approximately equal to TRCD + 2×CL.

Command Rate (CR) - Now, 1T means it takes 1 clock cycle to "find" a memory bank, vs. 2T where it takes 2 clock cycles to "find" the memory bank. Whether the chip select can be executed in a single clock or whether it needs two clocks, depends on a variety of factors. Among the most crucial contributing factors appears to be the number of banks populated within the system from which the correct bank has to be selected. In a single bank configuration, the system already knows that all data have to be within this bank. If more banks are populated, there is an additional decision involved. 

Testing and finding optimum timings can be very time-consuming, and it’s a matter of many attempts to achieve stability. Fine-tuning the above settings can definitely bring some really nice improvements (especially Command Rate is commonly underestimated). There are some further timings, which most users leave for the motherboard to configure automatically, but thanks to the Ryzen Dram Calculator you can try to optimize that.


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Basic info about the used memory

in this article, we'll use mainly the two sets of Zadak Spark RGB 2 x 8 GB 4133 MHz, which we reviewed here before (but reviewed with a Z390 and i7 8700K combo). Additionally, for the Double Rank vs Single Rank page, we've used the  Crucial Ballistix Gaming 3200 MHz 4 x 16 GB  First up is Thaiphoon Burner, which is a very good utility for checking the basic data on a RAM die. According to the program, the chips under the “hood” are Samsung B-Dies (from a better series - BCPB).   


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Manufacturer:

Zadak

Model:

Spark RGB

Frequency:

DDR4-4133

Basic timings:

19-21-21-42

Capacity:

2 x 8 GB

Voltage:

1.4 V

PCB Type:

8 layers

Form Factor:

288-pin DIMM

Warranty:

Limited Lifetime




The chips are covered with a heatsink to ensure that the memory and PCB maintain a similar temperature, providing the best performance. Zadak Spark RGB RAM is a very nice kit that allows checking different variants of frequency/latencies.

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