AMD released a 392 pages strong PDF outlining the R700-Family Instruction Set Architecture, this week. It includes documentation for the RV710 (Radeon 4350/4550), the RV730 (Radeon 4670/4650), the RV740 (Radeon 4770/4750), the RV770 (Radeon 4870/4850/4830), and the RV790 (Radeon 4890).

"This document describes the instruction set architecture (ISA) native to the R700 family of processors. It defines the instructions and formats accessible to programmers and compilers. The document serves two purposes:

•  It specifies the instructions (including the format of each type of instruction) and the relevant program state (including how the program state interacts with the instructions). Some instruction fields are mutually dependent; not all possible settings for all fields are legal. This document specifies the valid combinations.
• It provides the programming guidelines for compiler writers to maximize processor performance.

This document is intended for programmers writing application and system software, including operating systems, compilers, loaders, linkers, device drivers, and system utilities; it is specifically for those who want to maximize software performance. It assumes that programmers are writing compute-intensive parallel applications (streaming applications) and assumes an understanding of requisite programming practices."

One interesting detail is the missing burst reads in memory read instructions of the RV770:

"Burst memory reads are not supported by the RV770; however, the 710, 730, 740, and 790 do support it. Chips after R770 support burst reads in memory-read instructions. This allows up to 16 consecutive locations to be read into up to 16 consecutive GPRs."

Provided that ATI is going to take advantage of this feature in the RV790 with their drivers, the Radeon HD 4890 should be able to work more efficiently than the RV770 series (Radeon 4870/4850/4830).