Why is memory so important? I don't know I can't remember; waah what a lame joke :: Hilbert wipes a tear from his eye ::
To understand this we'll start off with the regular A-B-C of memory. When you recently bought a PC, or for that matter are buying a new system you'll notice that most PC's make use of DDR400 (PC3200) memory or DDR2-533 (PC4200). It's the most commonly used type as this memory matches your PC's CPU bus speed. That CPU bus speed, also known as "front-side bus speed" (or FSB), is the speed at which the CPU communicates with RAM memory and the motherboard chipset. Athlon XPs have a 266, 333 or 400 MHz FSB, Pentium 4s have a 400MHz, 533MHz or 800MHz and the newer 1066 MHz FSB, AMD Durons have a 200MHz FSB and socket 478 Pentium CPU's have a 400MHz FSB, Socket 775 CPU's often have either a 400 or 533 MHz based on the CPU you use and so on and so on.
When choosing a FSB speed for the CPU you choose, be aware that you'll need to purchase memory capable of this faster speed. For example, many people are enticed by the remarkably low priced memory, yet you need to sync your memory to your CPU's FSB. First of all, all mainboard these days use either DDR or DDR2 memory, the mainboard we used needs DDR memory. So in our case we want to make make use 400 minimum yet recommended 533 or higher MHz DDR memory if we are going to overclock (increase the FSB). Why all over DDR533? When you start fooling around with that FSB you better make sure you have some really good memory as the increased FSB will have a huge impact on the memory also.
Always make sure you buy two bars so that you can have a dual-channel memory configuration, dual channel effectively double's the memory bandwidth and the Pentium 4 type of processors loves that bandwidth for sure as it has a nice impact on overall performance.
So keep this in mind, performance and stability of any system depends in part on the memory being used and the settings for the RAM timing. Many users may have their preference for "123" brand and certainly using brand name memory is a very good idea since low quality memory is often at the root of many stability issues. However, it is also important to pay attention to the timing settings of the memory being used.
As stated on the previous page this memory was made for a particular user, probably the majority of Guru3D.com visitors (hey come on now you are reading this aren't you?). It's the enthusiast high-end user that will buy this kind of memory: tweakers, overclockers, you name it. The fact that it can manage such extremely fast timing tells us a little about its capacity to perform and thus it brings flexibility for the PC tweakers out there. And when I say extremely fast timings, I mean extremely fast for DDR2 that is.
And what are these timings you are rambling about?
As you already noticed, this product is made for a rather specific category of PC users, tweakers and overclockers. People who tweak the crap out of their system, I like to call them enthusiasts or if you want, Guru3D's audience. To be able to test this product to it's fullest potential we will need to either tweak or overclock the PC and of course we'll do just that.
Understanding memory timings
Let's explain a little what you will run into with memory timings. First off latency. We used the word numerous times already in this article. Latency is the time between when a request is made and the request is answered. I.E, if you are in a restaurant for a meal, the latency would be the time between when you ordered your meal to the time you received it. Therefore, in memory terms, it is the total time required before data can be written to or read from the memory. Thus lower is better.
Then we notice on the packaging is this: 3:2:2:8 T1 for the XMS5400kit and 5:5:5:12 for the 800 MHz 2 GB kit. What do the numbers mean ?
3:2:2:8 T1 refers to CL-tRAS-tRCD-tRP settings and are measured in clock cycles.
tRAS Memory architecture is like a spreadsheet with row upon row and column upon column with each row being 1 bank. In order for the CPU to access memory, it must first determine which Row or Bank in the memory that is to be accessed and activate that row via the RAS signal. Once activated, the row can be accessed over and over until the data is exhausted. This is why tRAS has little effect on overall system performance but could impact system stability if set incorrectly.
tRCD There is a delay from when a row is activated to when the cell (or column) is activated via the CAS signal and data can be written to or read from a memory cell. This delay is called tRCD. When memory is accessed sequentially, the row is already active and tRCD will not have much impact. However, if memory is not accessed in a linear fashion, the current active row must be deactivated and then a new row selected/activated. It is this example where low tRCD's can improve performance. However, like any other memory timing, putting this too low for the module can result in instability.
CAS Latency Undoubtedly, one of the most essential timings is that of the CAS Latency and is also the one most people can actually understand. Since data is often accessed sequentially (same row), the CPU only needs to select the next column in the row to get the next piece of data. In other words, CAS Latency is the delay between the CAS signal and the availability of valid data on the data pins (DQ). Therefore, the latency between column accesses (CAS), plays an important role in the performance of the memory. The lower the latency, the better the performance. However, the memory modules must be capable of supporting low latency settings.
tRP tRP is the time required to terminate one one Row access and begin the next row access. Another way to look at this it that tRP is the delay required between deactivating the current row and selecting the next row. Therefore, in conjunction with tRCD, the time required (or clock cycles required) to switch banks (or rows) and select the next cell for either reading, writing or refreshing is a combination of tRP and tRCD.
tRAS Next comes tRAS. This is the time required before (or delay needed) between the active and precharge commands. In other words, how long must the memory wait before the next before the next memory access can begin.
tCLK This is simply the clock used for the memory. Note that Frequency is 1/t. Therefore, if memory was running at 100Mhz, the timing of the memory would be 1/100Mhz or 10nS.
Command Rate The Command Rate is the time needed between the chip select signal and the when commands can be issued to the RAM module IC. Typically, these are either 1 clock or 2.
In this test we will make use of a test system that allows overclocking and memory tweaking from within the BIOS.
Memory testing is a process of trial and error, find and seek and pretty much a sucker for your free time.
Increase the FSB, change the memory timings, but most of all alter memory dividers until your system won't boot. If you are not comfortable with such a thing, hey this isn't your game then. I recommend you to lower the processor's multiplier and then slightly increase the FSB with high memory timings and take it from there timings wise. Small side note here, the XMS2-5400UL modules have such aggressive timings they come shipped with SPD settings of 4-4-4-12 timings, which means your system should boot without problems even if you have an older mainboard chipset. Once the system is up and running you can lower the timings to 3-2-2-8 if all your other hardware can support these aggressive timings.
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