When the Radeon X1800 was released, one of the more fascinating things was its new memory controller; such a complex, yet beautiful design. With the HD 2900 XT something very significant changed. It's the move from 256-bit towards a steamy 512-bit memory interface on a kilobit memory controller (1024-bit ringbus (512-bit read + 512-bit write).

It's seriously a complex piece of art if you study it closer. The design is based on the original internal ring bus design, yet to put it simple; double everything up. So included onto the R600 is a new (v2) memory controller that works in a very advanced manner. 

I'll try to explain it in a very simple manner because the controller is so advanced you can easily get confused. Take for example a car, which in our case is a memory client request to the memory controller. Look at this entire procedure as a traffic, normally you have to deal with congestion at a certain point where it's busy at that crossing, right? If enough cars keep coming in, you'll get congestion. What do you do with such a traffic congestion/traffic jam? Yes indeed, everywhere in the world we build multi-lane traffic circles and insert traffic lights at the beginning crossings to prioritize and streamline traffic into the right direction.

Now think of the car (client data request) as traffic being sent to the ordinary crossing and in the new situation the traffic circle with traffic lights. Yes, this is in layman terms the way the new controller functions.

Huge flows of data traffic are no longer launched towards the memory controllers where it's jammed up, it's now sorted based on priority flag (at the proverbial traffic lights) and then sent into the right direction over the traffic circle. If we color coded 4 data packets green, yellow, blue and orange then each color will have a certain priority; you tag the data request. If red is the color that has the most priority, it'll be prioritized and sent to the first available memory unit connected to the controller. If an 'orange' data packet has less priority it would be managed in a slower stage. The result of this in very layman terms explanation, is the new ringbus memory controller.

It's way more dynamic in the way it can handle its memory packets. The end result is a much more efficient memory controller that will utilize available bandwidth to the maximum. So how much bandwidth does the HD 2900 XT have? Well, get this: Over 100 GB/sec of bandwidth running over eight 64-bit memory channels; 106 GB/sec to be precise.

Memory bandwidth is one of the biggest limitations in the graphics industry, so a lot can be won here. Lovely.